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參數(shù)資料
| 型號： | XCB56011BU95 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | 24-BIT DVD DIGITAL SIGNAL PROCESSOR |
| 中文描述： | 8-BIT, 95 MHz, OTHER DSP, PQFP100 |
| 封裝： | PLASTIC, TQFP-100 |
| 文件頁數(shù)： | 24/82頁 |
| 文件大?。?/td> | 318K |
| 代理商： | XCB56011BU95 |
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Preliminary Information
1-18
DSP56011 Technical Data Sheet, Rev. 1
MOTOROLA
Signal/Connection Descriptions
OnCE Port
PRELIMINARY
OnCE PORT
Table 1-12
On-Chip Emulation Port (OnCE) Signals
Signal
Name
Signal
Type
during
Reset
Signal Description
DSI
OS0
Input
Output
Low
Output
Debug Serial Input
—In Debug mode, serial data or
commands are provided as inputs to the OnCE controller via
the DSI signal. Data is latched on the falling edge of the DSCK
serial clock. Data is always shifted into the OnCE serial port
Most Significant Bit (MSB) first. When switching from output
to input, the signal is tri-stated.
Chip Status 0
—When the chip is not in Debug mode, this signal
is an output that works with the OS1 signal to provide
information about the chip status.
Note:
If the OnCE interface is in use, an external pull-down resistor
should be attached to this pin. If the OnCE interface is not in
use, the resistor is not required.
DSCK
OS1
Input
Output
Low
Output
Debug Serial Clock
—The DSCK signal is used in Debug mode
and supplies the serial input clock to the OnCE module to shift
data into and out of the OnCE serial port. (Data is clocked into
the OnCE port on the falling edge and is clocked out of the
OnCE serial port on the rising edge.) The debug serial clock
frequency must be no greater than
1
/
8
of the processor clock
frequency. When switching from input to output, the signal is
tri-stated.
Chip Status 1
—When the chip is not in Debug mode, this signal
is an output that works with the OS0 signal to provide
information about the chip status.
Note:
If the OnCE interface is in use, an external pull-down resistor
should be attached to this pin. If the OnCE interface is not in
use, the resistor is not required.
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