參數(shù)資料
型號(hào): XCA56011BU95
廠商: MOTOROLA INC
元件分類(lèi): 數(shù)字信號(hào)處理
英文描述: 24-BIT DVD DIGITAL SIGNAL PROCESSOR
中文描述: 8-BIT, 95 MHz, OTHER DSP, PQFP100
封裝: PLASTIC, TQFP-100
文件頁(yè)數(shù): 3/82頁(yè)
文件大?。?/td> 318K
代理商: XCA56011BU95
DSP56011
Features
Preliminary Information
MOTOROLA
DSP56011 Technical Data Sheet, Rev. 1
iii
PRELIMINARY
FEATURES
Digital Signal Processing Core
Efficient, object-code compatible, 24-bit DSP56000 family DSP engine
47.5 Million Instructions Per Second (MIPS) with 21.05 ns instruction cycle at 95 MHz
Highly parallel instruction set with unique DSP addressing modes
Two 56-bit accumulators including extension byte
Parallel 24
×
24-bit multiply-accumulate in 1 instruction cycle (2 clock cycles)
Double precision 48
×
48-bit multiply with 96-bit result in 6 instruction cycles
56-bit addition/ subtraction in 1 instruction cycle
Fractional and integer arithmetic with support for multi-precision arithmetic
Hardware support for block-floating point Fast Fourier Transforms (FFT)
Hardware nested DO loops
Zero-overhead fast interrupts (2 instruction cycles)
PLL-based clocking with a wide range of frequency multiplications (1 to 4096) and
power saving clock divider (2
: i = 0 to 15), which reduces clock noise
i
Four 24-bit internal data buses and three 16-bit internal address buses for
simultaneous accesses to one program and two data memories
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