參數(shù)資料
型號: XC4013E-6HG240M
廠商: Xilinx, Inc.
英文描述: Programmable Gate Arrays
中文描述: 可編程門陣列
文件頁數(shù): 29/68頁
文件大小: 462K
代理商: XC4013E-6HG240M
R
May 14, 1999 (Version 1.6)
6-33
XC4000E and XC4000X Series Field Programmable Gate Arrays
6
X5995
Direct
Connect
Edge
Decode
Double Long Global
Clock
Octal
Quad
Single
Double
Long
Direct
Connect
Long
INTERCONNECT
IOB
WED
WED
WED
IOB
Figure 31: High-Level Routing Diagram of XC4000 Series VersaRing (Left Edge)
WED = Wide Edge Decoder, IOB = I/O Block (shaded arrows indicate XC4000X only)
Segment with nearest buffer
connects to segment with furthest buffer
IOB
IOB
IOB
IOB
X9015
Figure 32: XC4000X Octal I/O Routing
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