參數(shù)資料
型號: XC4013E-6HG240M
廠商: Xilinx, Inc.
英文描述: Programmable Gate Arrays
中文描述: 可編程門陣列
文件頁數(shù): 13/68頁
文件大小: 462K
代理商: XC4013E-6HG240M
R
May 14, 1999 (Version 1.6)
6-17
XC4000E and XC4000X Series Field Programmable Gate Arrays
6
Enable
G'
4
G1 G4
F1 F4
WRITE
DECODER
1 of 16
DIN
16-LATCH
ARRAY
X6746
4
READ ADDRESS
MUX
Enable
F'
WRITE
DECODER
1 of 16
DIN
16-LATCH
ARRAY
4
READ ADDRESS
MUX
4
C1 C4
4
WE
D1
D0
EC
Figure 9: 16x2 (or 16x1) Level-Sensitive Single-Port RAM
Enable
WRITE
DECODER
1 of 16
DIN
16-LATCH
ARRAY
X6749
4
READ ADDRESS
MUX
Enable
WRITE
DECODER
1 of 16
DIN
16-LATCH
ARRAY
4
READ ADDRESS
MUX
G'
4
G1 G4
F1 F4
C1 C4
4
F'
WE
D1/A4
D0
EC
4
H'
Figure 10: 32x1 Level-Sensitive Single-Port RAM (F and G addresses are identical)
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