參數(shù)資料
型號(hào)： XC4013E-6HG240I
廠(chǎng)商： Xilinx, Inc.
英文描述： Programmable Gate Arrays
中文描述： 可編程門(mén)陣列
文件頁(yè)數(shù)： 59/68頁(yè)
文件大?。?/td> 462K
代理商： XC4013E-6HG240I
R
May 14, 1999 (Version 1.6)
6-63
XC4000E and XC4000X Series Field Programmable Gate Arrays
6
Figure 55: Master Parallel Mode Programming Switching Characteristics
Address for Byte n
Byte
2 T
DRC
Address for Byte n + 1
D7
D6
A0-A17
(output)
D0-D7
RCLK
(output)
CCLK
(output)
DOUT
(output)
1 T
RAC
7 CCLKs
CCLK
3 T
RCD
Byte n - 1
X6078
Description
Symbol
Min
0
60
0
Max
200
Units
ns
ns
ns
RCLK
Delay to Address valid
Data setup time
Data hold time
1
2
3
T
RAC
T
DRC
T
RCD
Notes:
1. At power-up, Vcc must rise from 2.0 V to Vcc min in less than 25 ms, otherwise delay configuration by pulling PROGRAM
Low until Vcc is valid.
2. The first Data byte is loaded and CCLK starts at the end of the first RCLK active cycle (rising edge).
This timing diagram shows that the EPROM requirements are extremely relaxed. EPROM access time can be longer than
500 ns. EPROM data output has no hold-time requirements.
相關(guān)PDF資料
PDF描述
XC4013E-6HG240M Programmable Gate Arrays
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XC4013E-6HG240M 制造商:XILINX 制造商全稱(chēng):XILINX 功能描述:Programmable Gate Arrays
XC4013E-6HQ240C 制造商:XILINX 制造商全稱(chēng):XILINX 功能描述:XC4000E and XC4000X Series Field Programmable Gate Arrays
XC4013E-6HQ240I 制造商:XILINX 制造商全稱(chēng):XILINX 功能描述:XC4000E and XC4000X Series Field Programmable Gate Arrays
XC4013E-6HQ240M 制造商:XILINX 制造商全稱(chēng):XILINX 功能描述:XC4000E and XC4000X Series Field Programmable Gate Arrays
XC4013E-6MQ240C 制造商:XILINX 制造商全稱(chēng):XILINX 功能描述:XC4000E and XC4000X Series Field Programmable Gate Arrays
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