參數(shù)資料
型號(hào): XC3195A-4PP175C
廠商: XILINX INC
元件分類: FPGA
英文描述: Field Programmable Gate Arrays (XC3000A/L, XC3100A/L)
中文描述: FPGA, 484 CLBS, 6500 GATES, 227 MHz, PPGA175
封裝: PLASTIC, PGA-175
文件頁(yè)數(shù): 48/50頁(yè)
文件大?。?/td> 474K
代理商: XC3195A-4PP175C
XC3000, XC3000A, XC3000L, XC3100, XC3100A Logic Cell Array Families
2-150
XC3195 PQ208 and PG223 Pinouts
Pin
Description
PG223
PQ208
A9-I/O
A10-I/O
I/O
I/O
I/O
I/O
A8-I/O
A11-I/O
I/O
I/O
I/O
I/O
A7-I/O
A12-I/O
I/O
I/O
I/O
I/O
I/O
I/O
A6-I/O
A13-I/O
VCC
GND
I/O
I/O
A5-I/O
A14-I/O
I/O
I/O
I/O
I/O
A4-I/O
A15-I/O
I/O
I/O
I/O
I/O
A3-I/O
A2-I/O
I/O
I/O
I/O
I/O
A1-CS2-I/O
A0-WS-I/O
GND
VCC
CCLK
DOUT-I/O
B1
E3
E4
C2
C1
D2
E2
F4
F3
D1
F2
G2
G4
G1
H2
H3
H1
H4
J3
J2
J1
K3
J4
K4
K2
K1
L2
L4
L3
L1
M1
M2
M4
N2
N3
P2
R1
N4
T1
R2
P3
T2
P4
U1
V1
T3
R3
R4
U2
V2
206
205
204
203
202
201
200
199
198
197
196
194
193
192
191
190
189
188
187
186
185
184
183
182
181
180
179
178
177
176
175
174
173
172
171
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
1
1
Pin
Description
PG223
PQ208
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
GND
VCC
INIT
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
LDC-I/O
I/O
I/O
I/O
HDC-I/O
M2-I/O
VCC
M0-RTIG
GND
M1/RDATA
U18
P15
T17
T18
P16
R17
N15
R18
P17
N17
N16
M15
M18
M17
L18
L17
L15
L16
K18
K17
K16
K15
J15
J16
J17
J18
H16
H15
H17
H18
G17
G18
G15
F16
F17
E17
C18
F15
D17
E16
C17
B18
E15
A18
A17
D16
B17
D15
C16
102
101
100
99
98
97
96
95
94
93
92
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
63
62
61
60
59
58
57
56
55
54
53
52
51
50
1
Pin
Description
PG223
PQ208
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
VCC
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
B16
A16
D14
C15
B15
A15
C14
D13
B14
C13
B13
B12
D12
A12
B11
C11
A11
D11
A10
B10
C10
C9
D10
D9
B9
A9
C8
D8
B8
A8
B7
A7
D7
B6
C6
B5
A4
D6
C5
B4
B3
C4
D5
C3
A3
A2
B2
D4
D3
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
14
13
12
11
10
9
8
7
6
5
4
3
2
1
208
207
TCLKIN-I/O
PWRDN
GND
VCC
1
Unprogrammed IOBs have a default pull-up. This prevents an undefined pad level for unbonded or unused IOBs. Programmed
outputs are default slew-rate limited.
In the PQ208 package, pins 15, 16, 64, 65, 90, 91, 142, 143, 170 and 195 are not connected.
*In PQ208, XC3090 and XC3195 have different pinouts.
相關(guān)PDF資料
PDF描述
XC3190A-4PP175I Field Programmable Gate Arrays (XC3000A/L, XC3100A/L)
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