- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄374982 > XC3195A-3PC84C (XILINX INC) Field Programmable Gate Arrays (XC3000A/L, XC3100A/L) PDF資料下載
參數(shù)資料
| 型號(hào)： | XC3195A-3PC84C |
| 廠商： | XILINX INC |
| 元件分類： | FPGA |
| 英文描述： | Field Programmable Gate Arrays (XC3000A/L, XC3100A/L) |
| 中文描述： | FPGA, 484 CLBS, 6500 GATES, 270 MHz, PQCC84 |
| 封裝： | PLASTIC, LCC-84 |
| 文件頁數(shù)： | 25/50頁 |
| 文件大?。?/td> | 474K |
| 代理商： | XC3195A-3PC84C |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁當(dāng)前第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁
2-127
Master Parallel Mode Programming Switching Characteristics
Description
Symbol
Min
Max
Units
RCLK
To address valid
To data setup
To data hold
RCLK High
RCLK Low
1
2
3
T
RAC
T
DRC
T
RCD
T
RCH
T
RCL
0
200
ns
ns
ns
ns
μ
s
60
0
600
4.0
Notes: 1. At power-up, V
CC
must rise from 2.0 V to V
CC
min in less than 25 ms. If this is not possible, configuration can be
delayed by holding RESET Low until V
CC
has reached 4.0 V (2.5 V for the XC3000L). A very long V
CC
rise time of
>100 ms, or a non-monotonically rising V
CC
may require a >6-
μ
s High level on RESET, followed by a >6-
μ
s Low
level on RESET and D/P after V
CC
has reached 4.0 V (2.5 V for the XC3000L).
2. Configuration can be controlled by holding RESET Low with or until after the INIT of all daisy-chain slave-mode
devices is High.
This timing diagram shows that the EPROM requirements are extremely relaxed:
EPROM access time can be longer than 4000 ns. EPROM data output has no hold time requirements.
Address for Byte n
Byte
2 T
DRC
Address for Byte n + 1
D7
D6
A0-A15
(output)
D0-D7
RCLK
(output)
CCLK
(output)
DOUT
(output)
1 T
RAC
7 CCLKs
CCLK
3 T
RCD
Byte n - 1
X5380
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XC3195A-3PC84I | Field Programmable Gate Arrays (XC3000A/L, XC3100A/L) |
| XC3195A-3PQ160C | Field Programmable Gate Arrays (XC3000A/L, XC3100A/L) |
| XC3195A-3PQ160I | Field Programmable Gate Arrays (XC3000A/L, XC3100A/L) |
| XC3195A-3PQ208C | Field Programmable Gate Arrays (XC3000A/L, XC3100A/L) |
| XC3195A-3PQ208I | Field Programmable Gate Arrays (XC3000A/L, XC3100A/L) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XC3195A-3PG175C | 制造商:Xilinx 功能描述: |
| XC3195A-3PQ160C | 功能描述:IC FPGA 484 CLB'S 160-PQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:XC3000A/L 產(chǎn)品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標(biāo)準(zhǔn)包裝:24 系列:XC4000E/X LAB/CLB數(shù):100 邏輯元件/單元數(shù):238 RAM 位總計(jì):3200 輸入/輸出數(shù):80 門數(shù):3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應(yīng)商設(shè)備封裝:120-CPGA（34.55x34.55） |
| XC3195A-3PQ208C | 制造商:Xilinx 功能描述: |
| XC3195A-3PQ208I | 制造商:Xilinx 功能描述: |
| XC3195A-4PC8 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。