參數(shù)資料
型號(hào)： XC3164A-3TQ144I
廠商： XILINX INC
元件分類： FPGA
英文描述： Field Programmable Gate Arrays (XC3000A/L, XC3100A/L)
中文描述： FPGA, 224 CLBS, 3500 GATES, 270 MHz, PQFP144
封裝： PLASTIC, TQFP-144
文件頁(yè)數(shù)： 32/50頁(yè)
文件大?。?/td> 474K
代理商： XC3164A-3TQ144I
XC3000, XC3000A, XC3000L, XC3100, XC3100A Logic Cell Array Families
2-134
Figure 26. Relative Delay as a Function of Temperature, Supply Voltage and Processing Variations
Power
Power Distribution
Power for the LCA device is distributed through a grid to
achieve high noise immunity and isolation between logic
and I/O. Inside the LCA device, a dedicated V
CC
and
ground ring surrounding the logic array provides power to
the I/O drivers. An independent matrix of V
CC
and
groundlines supplies the interior logic of the device. This
power distribution grid provides a stable supply and ground
for all internal logic, providing the external package power
pins are all connected and appropriately decoupled. Typi-
cally a 0.1-
μ
F capacitor connected near the V
CC
and
ground pins will provide adequate decoupling.
Output buffers capable of driving the specified 4- or 8-mA
loads under worst-case conditions may be capable of
driving as much as 25 to 30 times that current in a best
case. Noise can be reduced by minimizing external load
capacitance and reducing simultaneous output transitions
in the same direction. It may also be beneficial to locate
heavily loaded output buffers near the ground pads. The
I/O Block output buffers have a slew-limited mode which
should be used where output rise and fall times are not
speed critical. Slew-limited outputs maintain their dc drive
capability, but generate less external reflections and inter-
nal noise.
S250
200
150
100
50
3 CLBs
(3-12)
4 CLBs
(4-16)
2 CLBs
(2-8)
1 CLB
(1-4)
XC3100-3
XC3000-125
CLB Levels:
Gate Levels:
300
Toggle
Rate
0
X3250
Figure 27. Clock Rate as a Function of Logic Complexity
(Number of Combinational Levels between
Flip-Flops)
1.00
0.80
0.60
0.40
0.20
SPECIFIED WORST-CASE VALUES
MAX COMMERCIAL (4.75 V)
MAX MILITARY (4.5 V)
– 55
MIN MILITARY (5.5 V)
MIN COMMERCIAL (4.75 V)
MIN COMMERCIAL (5.25 V)
TYPICAL COMMERCIAL
(+ 5.0 V, 25
°
C)
TYPICAL MILITARY
TEMPERATURE (
°
C)
– 40
– 20
0
25
40
70
80
100
125
N
X6094
MIN MILITARY (4.5 V)
相關(guān)PDF資料
PDF描述
XC3164A-4PC84C Field Programmable Gate Arrays (XC3000A/L, XC3100A/L)
XC3164A-4PC84I Field Programmable Gate Arrays (XC3000A/L, XC3100A/L)
XC3164A-4PQ160C Field Programmable Gate Arrays (XC3000A/L, XC3100A/L)
XC3164A-4PQ160I Field Programmable Gate Arrays (XC3000A/L, XC3100A/L)
XC3164A-4TQ144C Field Programmable Gate Arrays (XC3000A/L, XC3100A/L)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XC3164A-4PC84C 制造商:Xilinx 功能描述:XLXXC3164A-4PC84C IC SYSTEM GATE
XC3164A-4PC84I 制造商:Xilinx 功能描述:
XC3164A4PG132AKJ 制造商:XILINX 功能描述:*
XC3164A-4PQ160C 制造商:Xilinx 功能描述: 制造商:Xilinx 功能描述:Field-Programmable Gate Array, 224 Cell, 160 Pin, Plastic, QFP
XC3164A-4PQ160I 制造商:Xilinx 功能描述:
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