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參數(shù)資料
| 型號： | XC3120A-09PC68C |
| 廠商： | XILINX INC |
| 元件分類： | FPGA |
| 英文描述： | Field Programmable Gate Arrays (XC3000A/L, XC3100A/L) |
| 中文描述： | FPGA, 64 CLBS, 1000 GATES, 370 MHz, PQCC68 |
| 封裝： | PLASTIC, LCC-68 |
| 文件頁數(shù)： | 41/50頁 |
| 文件大?。?/td> | 474K |
| 代理商： | XC3120A-09PC68C |
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2-143
XC3000 Families 100-Pin QFP Pinouts
XC3000, XC3000A, XC3000L, XC3100 and XC3100A families have identical pinouts
Pin No.
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
I/O
*
I/O
*
M1-RD
GND
*
MO-RT
VCC
*
M2-I/O
HDC-I/O
I/O
LDC-I/O
I/O
*
I/O*
I/O
I/O
I/O
INIT-I/O
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
*
I/O
*
XTL2-I/O
GND
*
RESET
VCC
*
DONE-PG
D7-I/O
BCLKIN-XTL1-I/O
D6-I/O
Pin No.
1
2
3
4
5
6
7
8
9
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
13
14
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
GND
A13-I/O
A6-I/O
A12-I/O
A7-I/O
I/O
*
I/O
*
A11-I/O
A8-I/O
A10-I/O
A9-I/O
VCC
*
GND
*
PWRDN
TCLKIN-I/O
I/O
**
I/O
*
I/O
*
I/O
I/O
I/O
I/O
I/O
I/O
I/O
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
Unprogrammed IOBs have a default pull-up. This prevents an undefined pad level for unbonded or unused IOBs.
Programmed outputs are default slew-rate limited.
* This table describes the pinouts of three different chips in three different packges. The pin-description column lists 100 of the 118
pads on the XC3042 that are connected to the 100 package pins. Two pads, indicated by double asterisks, do not exist on the
XC3030, which has 98 pads; therefore the corresponding pins have no connections. Twenty-six pads, indicated by single or double
asterisks, do not exist on the XC3020, which has 74 pads; therefore, the corresponding pins have no connections. (See table on
page 2-139.)
TQFP
VQFP
CQFP PQFP
TQFP
VQFP
CQFP PQFP
XC3020
XC3030
XC3042
XC3020
XC3030
XC3042
TQFP
VQFP
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
1
2
3
4
5
6
7
8
9
10
11
CQFP PQFP
XC3020
XC3030
XC3042
I/O
*
I/O
*
I/O
D5-I/O
CS0-I/O
D4-I/O
I/O
VCC
D3-I/O
CS1-I/O
D2-I/O
I/O
I/O
*
I/O
*
D1-I/O
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
1
2
3
4
5
6
7
8
9
10
11
12
13
14
RDY/BUSY-RCLK-I/O
DO-DIN-I/O
DOUT-I/O
CCLK
VCC
*
GND
*
AO-WS-I/O
A1-CS2-I/O
I/O
**
A2-I/O
A3-I/O
I/O
*
I/O
*
A15-I/O
A4-I/O
A14-I/O
100
15
12
A5-I/O
Pin No.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XC3120A-09PC84C | Field Programmable Gate Arrays (XC3000A/L, XC3100A/L) |
| XC3142A-09PC84C | Field Programmable Gate Arrays (XC3000A/L, XC3100A/L) |
| XC3120A-09PQ100C | Field Programmable Gate Arrays (XC3000A/L, XC3100A/L) |
| XC3142A-09PQ100C | Field Programmable Gate Arrays (XC3000A/L, XC3100A/L) |
| XC3142A-09TQ144C | Field Programmable Gate Arrays (XC3000A/L, XC3100A/L) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XC3120A-09PC84C | 制造商:XILINX 制造商全稱:XILINX 功能描述:Field Programmable Gate Arrays (XC3000A/L, XC3100A/L) |
| XC3120A-09PC84I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field Programmable Gate Array (FPGA) |
| XC3120A-09PQ100C | 制造商:XILINX 制造商全稱:XILINX 功能描述:Field Programmable Gate Arrays (XC3000A/L, XC3100A/L) |
| XC3120A-1PC68C | 制造商:XILINX 制造商全稱:XILINX 功能描述:Field Programmable Gate Arrays (XC3000A/L, XC3100A/L) |
| XC3120A-1PC84C | 制造商:XILINX 制造商全稱:XILINX 功能描述:Field Programmable Gate Arrays (XC3000A/L, XC3100A/L) |
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