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| 型號： | XC3042L-8TQ144I |
| 廠商： | XILINX INC |
| 元件分類： | FPGA |
| 英文描述： | Field Programmable Gate Arrays (XC3000A/L, XC3100A/L) |
| 中文描述： | FPGA, 144 CLBS, 2000 GATES, 80 MHz, PQFP144 |
| 封裝： | PLASTIC, TQFP-144 |
| 文件頁數(shù)： | 14/50頁 |
| 文件大?。?/td> | 474K |
| 代理商： | XC3042L-8TQ144I |
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XC3000, XC3000A, XC3000L, XC3100, XC3100A Logic Cell Array Families
2-116
Control of the 3-state input by the same signal that drives
the buffer input, creates an open-drain wired-AND func-
tion. A logic High on both buffer inputs creates a high
impedance, which represents no contention. A logic Low
enables the buffer to drive the Longline Low. See Figure
15b. Pull-up resistors are available at each end of the
Longline to provide a High output when all connected
buffers are non-conducting. This forms fast, wide gating
functions. When data drives the inputs, and separate
signals drive the 3-state control lines, these buffers form
multiplexers (3-state busses). In this case, care must be
used to prevent contention through multiple active buffers
Figure 14
.
Programmable Interconnection of Longlines.
This is provided at the edges of the routing area. Three-state buffers
allow the use of horizontal Longlines to form on-chip wired AND and multiplexed buses. The left two non-clock vertical Longlines
per column (except XC3020) and the outer perimeter Longlines may be programmed as connectible half-length lines.
X1244
X1741
D
A
A
D
B
B
D
C
C
D
N
N
D
A
A
+
=
D
B
B
+ D
C
C
+
D
N
N
Z
… +
WEAK
KEEPER
CIRCUIT
Figure 15b.
3-State Buffers Implement a Multiplexer.
The selection is accomplished by the buffer 3-state signal.
V
CC
D
A
D
B
D
C
D
N
V
CC
Z
=
D
A
D
B
D
C
...
D
N
X3036
(LOW)
T
OE
Figure 15a
.
3-State Buffers Implement a Wired-AND Function.
When all the buffer 3-state
lines are High, (high impedance), the pull-up resistor(s) provide the High output. The buffer
inputs are driven by the control signals or a Low.
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| XC3142A-4PC84C | Field Programmable Gate Arrays (XC3000A/L, XC3100A/L) |
| XC3142A-4PC84I | Field Programmable Gate Arrays (XC3000A/L, XC3100A/L) |
| XC3142A-4PQ100I | Field Programmable Gate Arrays (XC3000A/L, XC3100A/L) |
| XC3142A-4TQ144C | Field Programmable Gate Arrays (XC3000A/L, XC3100A/L) |
| XC3142A-4TQ144I | Field Programmable Gate Arrays (XC3000A/L, XC3100A/L) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| XC3042L-8VQ100C | 功能描述:IC FPGA 3.3V C-TEMP 100-VQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:XC3000A/L 產(chǎn)品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標(biāo)準(zhǔn)包裝:24 系列:XC4000E/X LAB/CLB數(shù):100 邏輯元件/單元數(shù):238 RAM 位總計:3200 輸入/輸出數(shù):80 門數(shù):3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應(yīng)商設(shè)備封裝:120-CPGA（34.55x34.55） |
| XC3042L-8VQ100I | 功能描述:IC FPGA 3.3V I-TEMP 100-VQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:XC3000A/L 產(chǎn)品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標(biāo)準(zhǔn)包裝:24 系列:XC4000E/X LAB/CLB數(shù):100 邏輯元件/單元數(shù):238 RAM 位總計:3200 輸入/輸出數(shù):80 門數(shù):3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應(yīng)商設(shè)備封裝:120-CPGA（34.55x34.55） |
| XC3042PC84BS70C | 制造商:Xilinx 功能描述: |
| XC3042PQ100BKJ9721 | 制造商:XI 功能描述:3042PQ100BK XILINX S9I7B |
| XC3064 | 制造商:XILINX 制造商全稱:XILINX 功能描述:Logic Cell Array Families |
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