參數(shù)資料
型號(hào)： XC3042A-6TQ144C
廠商： XILINX INC
元件分類： FPGA
英文描述： Field Programmable Gate Arrays (XC3000A/L, XC3100A/L)
中文描述： FPGA, 144 CLBS, 2000 GATES, 135 MHz, PQFP144
封裝： PLASTIC, TQFP-144
文件頁(yè)數(shù)： 23/50頁(yè)
文件大?。?/td> 474K
代理商： XC3042A-6TQ144C
2-125
Serial Data In
CCLK
(Output)
Serial DOUT
(Output)
1
T
DSCK
2
T
CKDS
n
n + 1
n + 2
n – 3
n – 2
n – 1
n
X3223
Master Serial Mode Programming Switching Characteristics
Speed Grade
Min
Max
Units
Description
Symbol
CCLK
Data In setup
Data In hold
1
2
T
DSCK
60
0
ns
ns
CKDS
Notes: 1. At power-up, V
CC
must rise from 2.0 V to V
CC
min in less than 25 ms. If this is not possible, configuration can be
delayed by holding RESET Low until V
CC
has reached 4.0 V (2.5 V for the XC3000L). A very long V
CC
rise time of
>100 ms, or a non-monotonically rising V
CC
may require >6-
μ
s High level on RESET, followed by a >6-
μ
s Low
level on RESET and D/P after V
CC
has reached 4.0 V (2.5 V for the XC3000L).
2. Configuration can be controlled by holding RESET Low with or until after the INIT of all daisy-chain slave-mode
devices is High.
3. Master-serial-mode timing is based on slave-mode testing.
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