2000–2007 Xilinx, Inc. All rights reserved. XILINX, the Xilinx logo, the Brand Window, and other designated brands included herein are trademarks of Xilinx, Inc. All other
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DS031 (v3.5) November 5, 2007
Product Specification
1
Module 1:
Introduction and Overview
7pages
Summary of Features
General Description
Architecture
Device/Package Combinations and Maximum I/O
Ordering Examples
Module 2:
Functional Description
41 pages
Detailed Description
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Input/Output Blocks (IOBs)
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Digitally Controlled Impedance (DCI)
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Configurable Logic Blocks (CLBs)
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18-Kb Block SelectRAM Resources
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18-Bit x 18-Bit Multipliers
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Global Clock Multiplexer Buffers
-
Digital Clock Manager (DCM)
Routing
Creating a Design
Configuration
Module 3:
DC and Switching Characteristics
43 pages
Electrical Characteristics
Performance Characteristics
Switching Characteristics
Pin-to-Pin Output Parameter Guidelines
Pin-to-Pin Input Parameter Guidelines
DCM Timing Parameters
Source-Synchronous Switching Characteristics
Module 4:
Pinout Information
226 pages
Pin Definitions
Pinout Tables
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CS144/CSG144 Chip-Scale BGA Package
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FG256/FGG256 Fine-Pitch BGA Package
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FG456/FGG456 Fine-Pitch BGA Package
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FG676/FGG676 Fine-Pitch BGA Package
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BG575/BGG575 Standard BGA Package
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BG728/BGG728 Standard BGA Package
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FF896 Flip-Chip Fine-Pitch BGA Package
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FF1152 Flip-Chip Fine-Pitch BGA Package
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FF1517 Flip-Chip Fine-Pitch BGA Package
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BF957Flip-Chip BGA Package
IMPORTANT NOTE: Page, figure, and table numbers begin at 1 for each module, and each module has its own Revision
History at the end. Use the PDF "Bookmarks" pane for easy navigation in this volume.
1
Virtex-II Platform FPGAs:
Complete Data Sheet
DS031 (v3.5) November 5, 2007
Product Specification
R