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參數(shù)資料
| 型號： | W3H64M72E-400SBM |
| 英文描述： | 64M x 72 DDR2 SDRAM 208 PBGA Multi-Chip Package |
| 中文描述： | 64米× 72 DDR2 SDRAM的208 PBGA封裝多芯片封裝 |
| 文件頁數(shù)： | 1/30頁 |
| 文件大?。?/td> | 956K |
| 代理商： | W3H64M72E-400SBM |
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W3H64M72E-XSBX
ADVANCED*
1
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
March 2006
Rev. 1
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
64M x 72 DDR2 SDRAM 208 PBGA Multi-Chip Package
FEATURES
Data rate = 667*, 533, 400
Package:
208 Plastic Ball Grid Array (PBGA), 17 x 23mm
1.0mm pitch
DDR2 Data Rate = 667*, 533, 400
Core Supply Voltage = 1.8V ± 0.1V
I/O Supply Voltage = 1.8V ± 0.1V - (SSTL_18
compatible)
Differential data strobe (DQS, DQS#) per byte
Internal, pipelined, double data rate architecture
4-bit prefetch architecture
DLL for alignment of DQ and DQS transitions with
clock signal
Eight internal banks for concurrent operation
(Per DDR2 SDRAM Die)
Programmable Burst lengths: 4 or 8
Auto Refresh and Self Refresh Modes
On Die Termination (ODT)
Adjustable data – output drive strength
Programmable CAS latency: 3, 4 or 5
Posted CAS additive latency: 0, 1, 2, 3 or 4
Write latency = Read latency - 1*
t
CK
Commercial, Industrial and Military Temperature
Rang es
Organized as 64M x 72
Weight: W3H64M72E-XSBX - 2.5 grams typical
BENEFITS
63% SPACE SAVINGS vs. FPBGA
Re duced part count
55% I/O reduction vs FPBGA
Re duced trace lengths for low er par a sit c
ca pac ance
Suit able for hi-re i abil y ap pli ca ions
Upgradable to 128M x 72 den si y (con act fac o y
for information)
* This product is under development, is not qualified or characterized and is subject
to change or cancellation without notice.
Area
I/O
Count
5 x 209mm
2
= 1,045mm
2
391mm
2
63%
5 x 92 balls = 460 balls
208 Balls
55%
S
A
V
I
N
G
S
Actual Size
W3H64M72E-XSBX
CSP Approach (mm)
90
FBGA
11.0
19.0
23
17
90
FBGA
11.0
90
FBGA
11.0
90
FBGA
11.0
90
FBGA
11.0
FIGURE 1 – DENSITY COMPARISONS
White Electronic Designs
W3H64M72E-XSBX
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PDF描述 |
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| W3H64M72E-533ES | 64M x 72 DDR2 SDRAM 208 PBGA Multi-Chip Package |
| W3H64M72E-533ESC | 64M x 72 DDR2 SDRAM 208 PBGA Multi-Chip Package |
| W3H64M72E-533ESI | 64M x 72 DDR2 SDRAM 208 PBGA Multi-Chip Package |
| W3H64M72E-533ESM | 64M x 72 DDR2 SDRAM 208 PBGA Multi-Chip Package |
| W3H64M72E-533SB | 64M x 72 DDR2 SDRAM 208 PBGA Multi-Chip Package |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W3H64M72E-533ES | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:64M x 72 DDR2 SDRAM 208 PBGA Multi-Chip Package |
| W3H64M72E-533ESC | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:64M x 72 DDR2 SDRAM 208 PBGA Multi-Chip Package |
| W3H64M72E-533ESI | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:64M x 72 DDR2 SDRAM 208 PBGA Multi-Chip Package |
| W3H64M72E-533ESM | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:64M x 72 DDR2 SDRAM 208 PBGA Multi-Chip Package |
| W3H64M72E-533SB | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:64M x 72 DDR2 SDRAM 208 PBGA Multi-Chip Package |
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