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參數(shù)資料
| 型號： | UPD44165094AF5-E40Y-EQ2 |
| 元件分類： | SRAM |
| 英文描述： | 2M X 9 QDR SRAM, 0.45 ns, PBGA165 |
| 封裝： | 13 X 15 MM, PLASTIC, BGA-165 |
| 文件頁數(shù)： | 10/40頁 |
| 文件大小： | 388K |
| 代理商： | UPD44165094AF5-E40Y-EQ2 |
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18
Data Sheet
M17771EJ3V0DS
μPD44165084A, 44165094A, 44165184A, 44165364A
Electrical Specifications
Absolute Maximum Ratings
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
Supply voltage
VDD
–0.5
+2.5
V
Output supply voltage
VDDQ
–0.5
VDD
V
Input voltage
VIN
–0.5
VDD + 0.5 (2.5 V MAX.)
V
Input / Output voltage
VI/O
–0.5
VDDQ + 0.5 (2.5 V MAX.)
V
Operating ambient temperature
TA
Commercial
0
+70
°C
Industrial
–40
+85
Storage temperature
Tstg
–55
+125
°C
Caution Exposing the device to stress above those listed in Absolute Maximum Ratings could cause
permanent damage. The device is not meant to be operated under conditions outside the limits
described in the operational section of this specification. Exposure to Absolute Maximum Rating
conditions for extended periods may affect device reliability.
Recommended DC Operating Conditions
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
Note
Supply voltage
VDD
1.7
1.9
V
Output supply voltage
VDDQ
1.4
VDD
V
1
Input HIGH voltage
VIH (DC)
VREF + 0.1
VDDQ + 0.3
V
1, 2
Input LOW voltage
VIL (DC)
–0.3
VREF – 0.1
V
1, 2
Clock input voltage
VIN
–0.3
VDDQ + 0.3
V
1, 2
Reference voltage
VREF
0.68
0.95
V
Notes 1. During normal operation, VDDQ must not exceed VDD.
2. Power-up: VIH
≤ VDDQ + 0.3 V and VDD ≤ 1.7 V and VDDQ ≤ 1.4 V for t ≤ 200 ms
Recommended AC Operating Conditions
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
Note
Input HIGH voltage
VIH (AC)
VREF + 0.2
–
V
1
Input LOW voltage
VIL (AC)
–
VREF – 0.2
V
1
Note 1. Overshoot: VIH (AC)
≤ VDD + 0.7 V (2.5 V MAX.) for t ≤ TKHKH/2
Undershoot: VIL (AC)
≥ – 0.5 V for t ≤ TKHKH/2
Control input signals may not have pulse widths less than TKHKL (MIN.) or operate at cycle rates less than
TKHKH (MIN.).
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