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參數(shù)資料
| 型號： | UCC1829J-1 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 2.2 A SWITCHING CONTROLLER, 4000 kHz SWITCHING FREQ-MAX, CDIP20 |
| 封裝： | CERDIP-20 |
| 文件頁數(shù)： | 1/10頁 |
| 文件大?。?/td> | 176K |
| 代理商： | UCC1829J-1 |
SLUS390 - MARCH 1998
FEATURES
Compatible with Voltage or Current
Mode Control Methods
Practical Operation at Switching
Frequencies to 4MHz
50ns Propagation Delay to Output
High Current Complementary
Outputs
Programmable Dead Time and
Frequency Oscillator
Pulse by Pulse Current Limiting
Latched Overcurrent Comparator
with Full Cycle Restart
Programmable Undervoltage
Lockout (UVLO)
Adjustable Blanking for Leading
Edge Noise Tolerance
High Speed PWM Controller
UDG-98043
UCC1829-1/-2/-3
UCC2829-1/-2/-3
UCC3829-1/-2/-3
PRELIMINARY
DESCRIPTION
The UCC3829 is a BiCMOS High Speed PWM Controller IC. It is opti-
mized for high frequency switched mode power supply applications. The
IC can be used in both voltage mode and current mode control applica-
tions. Care was given to minimizing the propagation delays through the
comparators and logic circuitry while maximizing the bandwidth and slew
rate of the error amplifier. The oscillator frequency and deadtime can be
programmed via two external resistors and a capacitor. The undervolt-
age lockout threshold can be programmed using an external resistor di-
vider. The current limit and overcurrent threshold can be set externally.
The IC is available in push-pull (-1), single ended (-2), or complementary
(-3) output configuration.
Fault protection circuitry includes undervoltage detection for the internal
bias supply, and overcurrent detection. The fault detection logic sets a
latch that ensures full discharge of the soft start capacitor before allowing
a restart. While the fault latch is set, the outputs are in a low state. In the
event of continuous faults, the soft start capacitor is fully charged before
discharging to insure that the fault frequency does not exceed the de-
signed soft start period.
15
13
18
14
18
VDD
PGND
OUTA
OUTB
GND
10
SS
S
R
D
Q
1V
2
INV
1
NINV
V
BIAS
3
EAOUT
5
RAMP
4
19
LEB
1.5V
1.2V
4V
6
RT2
7
CT
CLOCK
V
BIAS
8
RT1
9
BISYNC
S
R
Q
T
>
Q
V
BIAS
1.25V
0.9V
3V
REFERENCE
11
23
17
VREF
CL–
UVLO
2.1V
3V/2.5V
14.2V/9V
12
CL+
PWCONT
BLOCK DIAGRAM
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