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參數(shù)資料
| 型號： | TVP5020TQFP |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | NTSC/PAL VIDEO DECODER |
| 中文描述： | NTSC / PAL視頻解碼器 |
| 文件頁數(shù)： | 29/87頁 |
| 文件大?。?/td> | 387K |
| 代理商： | TVP5020TQFP |
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2–15
2.6.3
The read operation has two phases, the address phase and the data phase. In the address phase, the I
2
C
master initiates a write operation to the TVP5020 by generating a start condition followed by the TVP5020’s
I
2
C address (101110X). The address is in MSB first bit order followed by a 0 to indicate a write cycle. After
receiving a TVP5020 acknowledge, the I
2
C master sends a subaddress of the register or the block of
registers where it will read. The TVP5020 acknowledges the receipt of the address. The I
2
C master ends
the address phase by generating a stop condition. During the data phase, the I
2
C master initiates a read
operation to the TVP5020 by generating a start condition followed by the TVP5020’s I
2
C address (101110X).
The address is in MSB first bit order followed by a 1 to indicate a read cycle. After receiving a TVP5020
acknowledge, the TVP5020 transfers a data byte to the master. The I
2
C master acknowledges the receipt
of each byte upon completion of each transfer. After the TVP5020 transfers the last byte, the I
2
C master ends
the read operation by generating a not acknowledge followed by a stop condition.
Read Address Phase
I
2
C Read Operation
0
I2C Start (Master)
S
7
6
5
4
3
2
1
0
I2C General address (Master)
1
0
1
1
1
0
X
0
9
I2C Acknowledge (Slave)
A
7
6
5
4
3
2
1
0
I2C Write register address (Master)
Addr
Addr
Addr
Addr
Addr
Addr
Addr
Addr
9
I2C Acknowledge (Slave)
A
0
I2C Stop (Master)
P
Read Data Phase
0
I2C Start (Master)
S
7
6
5
4
3
2
1
0
I2C General address (Master)
1
0
1
1
1
0
X
1
9
I2C Acknowledge (Slave)
A
7
6
5
4
3
2
1
0
I2C Read data (Slave)
Data
Data
Data
Data
Data
Data
Data
Data
9
I2C Acknowledge (Master)
/A
0
I2C Stop (Master)
P
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TVP5031 | NTSC/PAL VIDEO DECODER |
| TVP5031TQFP | NTSC/PAL VIDEO DECODER |
| TVP5031CPFP | Color Decoder Circuit |
| TVR4J | TOSHIBA Fast Recovery Diode Silicon Diffused Type High Speed Rectifier Applications (fast recovery) |
| TVR4N | TOSHIBA Fast Recovery Diode Silicon Diffused Type High Speed Rectifier Applications (fast recovery) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TVP5021PFP | 功能描述:視頻 IC NTSC/PAL DIGITAL VIDEO DECODER RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| TVP5021PFPG4 | 功能描述:視頻 IC NTSC/PAL DIGITAL VIDEO DECODER RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| TVP5031 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:NTSC/PAL VIDEO DECODER |
| TVP5031CPFP | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Color Decoder Circuit |
| TVP5031PFP | 功能描述:IC 9-BIT VIDEO DECODER 80-QFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉(zhuǎn)換器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 26/Apr/2011 標(biāo)準(zhǔn)包裝:1 系列:- 類型:編碼器 應(yīng)用:DVB-S.2 系統(tǒng) 電壓 - 電源，模擬:- 電壓 - 電源，數(shù)字:- 安裝類型:- 封裝/外殼:模塊 供應(yīng)商設(shè)備封裝:模塊 包裝:散裝 其它名稱:Q4645799 |
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