參數(shù)資料
型號(hào): TS3843BCD
廠商: Electronic Theatre Controls, Inc.
英文描述: High Performance Current Mode Controller
中文描述: 高性能電流模式控制器
文件頁(yè)數(shù): 12/20頁(yè)
文件大?。?/td> 521K
代理商: TS3843BCD
Undervoltage Lockout(contd.)
Figure 20 - External Clock
Synchronization
Figure 21 - External Duty Cycle Clamp
and Multi Unit Synchronization
Figure 23- Soft-Start Circuit
Figure 24- Adjustable Buffered Reduc-
tion of Clamp Level with Soft-Start
The diode clamp is required if the Sync amplitude is large enough to
cause the bottom side of C
T
to go more than 300mV below ground.
Virtually lossless current sensing can be achieved with the imple-
mentation of a SENSEFET power switch. For proper operation
during over current conditions, a reduction of the Ipk(max) clamp
level must be implemented. Refer to Figure 22 and 24.
2(3)
EA
Bias
+
Osc
R
R
R
2R
5(9)
1(1)
4(7)
8(14)
R
T
C
T
V
ref
0.01
External
Sync
Input
4
+
+
R
R
R
2R
Bias
Osc
EA
5(9)
1(1)
2(3)
4(7)
8(14)
To Additional
TS384X's
R
S
Q
8
4
6
5
2
1
C
3
7
R
A
R
B
5.0k
5.0k
5.0k
f
1.44
(RA
RB
Dmax
)
RB
RA +
=
=
+
-
5.0V Ref
+
-
S
R
Q
Bias
+
Osc
R
R
R
2R
EA
1.0V
5(9)
7(11)
6(10)
5(8)
3(5)
R
S
Q1
V
CC
V
in
1(1)
2(3)
4(7)
8(14)
R
1
V
Clamp
R
2
7(12)
Comp/Latch
1.0 mA
Ipk(max) =
=
VClamp
RS
1.67
R2
R1
Where: 0 V
Clamp
1.0 V
V
Clamp
1
+ 0.33x10
-3
R1R2
R1
R2
+
+
(
(
)
)
V
ref
5.0V Ref
+
-
S
R
Q
Bias
+
1.0mA
Osc
R
R
R
2R
EA
1.0V
5(9)
1(1)
2(3)
4(7)
8(14)
C
1.0M
5.0V Ref
+
-
S
R
Q
Bias
+
1.0mA
Osc
R
R
R
2R
EA
1.0V
5(9)
1(1)
2(3)
4(7)
8(14)
C
1.0M
Firuge 22-Adjustable Reduction
of Clamp Level
I
Soft-Start
=3600c in
μ
F
+
-
5.0V Ref
+
-
S
R
Q
(11)
(10)
(8)
Comp/Latch
(5)
R
S
1/4 W
V
CC
V
in
K
M
D
SENSEFET
G
S
Power Ground:
To Input Source
Return
Control Circuitry Ground:
To pin (9)
Vpin 5
RSIpk xrDS(on)
rDM(on)
RS
If: = 200
R
S
Then: Vpin 5 0.075 Ipk
(12)
=
+
Rs
Figure 25- Current Sensing Power MOSFET
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