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參數(shù)資料
| 型號： | TR3005 |
| 廠商： | RF Monolithics, Inc. |
| 英文描述： | 403.50 MHz Hybrid Transceiver |
| 中文描述： | 403.50兆赫混合收發(fā)器 |
| 文件頁數(shù)： | 10/12頁 |
| 文件大?。?/td> | 196K |
| 代理商： | TR3005 |
Pin
Name
Description
8
TXMOD
The trans mit er RF out put volt age is pro por ional to the in put cur ent to this pin. A se ies re sis or is used to ad ust
the peak trans mit er out put volt age. 0 dBm out put power re quires about 250 μA of in put cur ent. In the ASK mode,
min mum out put power oc curs when the mod u a ion driver sinks about 10 μA of cur ent from this pin. In the OOK
mode, in put sig nals less than 220 mV com pletely turn the trans mit er os cil a or off. In ernally, this pin ap pears to
be a di ode in se ies with a small re sis or. Peak trans mit er out put power P
O
for a 3 Vdc sup ply volt age is ap prox
mately:
P
O
= 16*(I
TXM
)
2
, where P
O
is in mW, and the peak mod u a ion cur ent I
TXM
is in mA
A ±5% re sis or value is rec om mended. In the OOK mode, this pin is usu ally driven with a logic-level data in put
(unshaped data pulses). OOK mod u a ion is prac i cal for data pulses of 30 μs or lon ger. In the ASK mode, this pin
ac cepts an a og mod u a ion (shaped or unshaped data pulses). ASK mod u a ion is prac i cal for data pulses 8.7 μs
or lon ger.
The re sis or driv ng this pin must be low in the re ceive and power-down (sleep) modes.
Please re er to
the
ASH Trans ceiver De signer’s Guide
for ad di ional in or ma ion on mod u a ion tech niques.
9
LPFADJ
This pin is the re ceiver low-pass fil er band width ad ust. The fil er band width is set by a re sis or R
be ween this
pin and ground. The re sis or value can range from 330 K to 820 ohms, pro vid ng a fil er 3 dB band width f
LPF
from
4.5 kHz to 1.8 MHz. The re sis or value is de er mined by:
R
LPF
= 1445/ f
LPF
, where R
LPF
is in kilohms, and f
LPF
is in kHz
A ±5% re sis or should be used to set the fil er band width. This will pro vide a 3 dB fil er band width be ween f
LPF
and 1.3* f
LPF
with vari a ions in sup ply volt age, tem per a ure, etc. The fil er pro vides a three-pole, 0.05 de gree
equiripple phase re sponse. The peak drive cur ent avail able from RXDATA in creases in pro por ion to the fil er
band width set ing.
10
GND2
GND2 is an IC ground pin. It should be connected to GND1 by a short, low in duc ance trace.
11
RREF
RREF is the ex er nal ref er ence re sis or pin. A 100 K ref er ence re sis or is con nected be ween this pin and ground.
A ±1% re sis or tol er ance is rec om mended. It is im por ant to keep the to al ca pac ance be ween ground, Vcc and
this node to less than 5 pF to main ain cur ent source sta bil ty. If THLD1 and/or THDL2 are con nected to RREF
through re sis or val ues less that 1.5 K, their node ca pac ance must be added to the RREF node ca pac ance and
the to al should not ex ceed 5 pF.
12
THLD2
THLD2 is the “dB-below-peak” data slicer (DS2) thresh old ad ust pin. The thresh old is set by a 0 to 200 K re sis or
R
be ween this pin and RREF. In creasing the value of the re sis or de creases the thresh old be ow the peak de
tec or value (in creases dif er ence) from 0 to 120 mV. For most ap pli ca ions, this thresh old should be set at 6 dB
be ow peak, or 60 mV for a 50%-50% RF am pli ier duty cy cle. The value of the THLD2 re sis or is given by:
R
TH2
= 1.67*V, where R
TH2
is in kilohms and the thresh old V is in mV
A ±1% re sis or tol er ance is rec om mended for the THLD2 re sis or. Leaving the THLD2 pin open dis ables the
dB-below-peak data slicer op er a ion.
13
THLD1
The THLD1 pin sets the thresh old for the stan dard data slicer (DS1) through a re sis or R
TH1
to RREF. The thresh
old is in creased by in creas ng the re sis or value. Con necting this pin di ectly to RREF pro vides zero thresh old.
The value of the re sis or de pends on whether THLD2 is used. For the case that THLD2 is not used, the ac cept
able range for the re sis or is 0 to 100 K, pro vid ng a THLD1 range of 0 to 90 mV. The re sis or value is given by:
R
TH1
= 1.11*V, where R
TH1
is in kilohms and the thresh old V is in mV
For the case that THLD2 is used, the ac cept able range for the THLD1 re sis or is 0 to 200 K, again pro vid ng a
THLD1 range of 0 to 90 mV. The re sis or value is given by:
R
TH1
= 2.22*V, where R
TH1
is in kilohms and the thresh old V is in mV
A ±1% re sis or tol er ance is rec om mended for the THLD1 re sis or. Note that a non-zero DS1 thresh old is re quired
for proper AGC op er a ion.
14
PRATE
The in er val be ween the fall ng edge of an ON pulse to the first RF am pli ier and the ris ng edge of the next ON
pulse to the first RF am pli ier t
is set by a re sis or R
be ween this pin and ground. The in er val t
can be ad
justed be ween 0.1 and 5 μs with a re sis or in the range of 51 K to 2000 K. The value of R
PR
is given by:
R
PR
= 404* t
PRI
+ 10.5, where t
PRI
is in μs, and R
PR
is in kilohms
A ±5% re sis or value is rec om mended. When the PWIDTH pin is con nected to Vcc through a 1 M re sis or, the RF
am pli i ers op er ate at a nom nal 50%-50% duty cy cle, fa cil at ng high data rate op er a ion. In this case, the pe iod
t
PRC
from start-to-start of ON pulses to the first RF am pli ier is con rolled by the PRATE re sis or over a range of 0.1
to 1.1 μs us ng a re sis or of 11 K to 220 K. In this case the value of R
PR
is given by:
R
PR
= 198* t
PRC
- 8.51, where t
PRC
is in μs and R
PR
is in kilohms
A ±5% re sis or value should also be used in this case. Please re er to the
ASH Trans ceiver De signer’s Guide
for
ad di ional am pli ier duty cy cle in or ma ion. It is im por ant to keep the to al ca pac ance be ween ground, Vcc and
this pin to less than 5 pF to main ain sta bil ty.
10
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