
Data Sheet
June 2002
TMXF28155 Supermapper
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
129
Agere Systems Inc.
8 TMUX Registers
(continued)
Table 153. TMUX Register Map
(continued)
Note:
The reset default of all reserved bits is 0. Shading denotes reserved bits.
Addr
Symbol
Bit 15 Bit 14 Bit 13 Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Transmit High-Speed Control Parameters
—
R/W
0x40035
page 105
TMUX_THS_
TOH_CTL
TMUX_
TCONCA
MODE
TMUX_TPR
EIRDISEL
TMUX_TLR
EIRDISEL
TMUX_TSS[1:0]
TMUX_THS
LREIINH
TMUX_THS
LAISINS
TMUX_THS
APSINS
TMUX_
THSK2INS
TMUX_
THSS1INS
TMUX_
THSF1INS
TMUX_
THSZ0INS
TMUX_
THSJ0INS
0x40036
page 107
TMUX_THS_
POH1_CTL
TMUX_THS
PREIINH1
TMUX_TP
OHTHRU1
TMUX_THS
N1INS1
TMUX_THS
K3INS1
TMUX_THS
F3INS1
TMUX_TH
SF2INS1
TMUX_
THSRDIPINS1
TMUX_
THSC2INS1
TMUX_
THSJ1INS1
0x40037
page 108
TMUX_THS_
POH2_CTL
TMUX_THS
PREIINH2
TMUX_TP
OHTHRU2
TMUX_THS
N1INS2
TMUX_THS
K3INS2
TMUX_THS
F3INS2
TMUX_TH
SF2INS2
TMUX_
THSRDIPINS2
TMUX_
THSC2INS2
TMUX_
THSJ1INS2
0x40038
page 109
TMUX_THS_
POH3_CTL
TMUX_THS
PREIINH3
TMUX_TP
OHTHRU3
TMUX_THS
N1INS3
TMUX_THS
K3INS3
TMUX_THS
F3INS3
TMUX_TH
SF2INS3
TMUX_
THSRDIPINS3
TMUX_
THSC2INS3
TMUX_
THSJ1INS3
Transmit High-Speed Line RDI Control Parameters
—
R/W
0x4003A
page 111
TMUX_TLRDI_
CTL
TMUX_
TRSD_
LRDIINH
TMUX_
TRSF_
LRDIINH
TMUX_TRL
AISMON_
LRDIINH
TMUX_
TRLOF_
LRDIINH
TMUX_
TROOF_
LRDIINH
TMUX_
TRLOS_
LRDIINH
TMUX_
TRILOC_
LRDIINH
Transmit High-Speed Path RDI Control Parameters
—
R/W
0x4003B
page 111
TMUX_TPRDI_
CTL
TMUX_TIM_PRDIINH[3:1]
TMUX_
TRUEQ_
PRDIINH
TMUX_
TRPLM_
PRDIINH
TMUX_
TRLOP_
PRDIINH
TMUX_
TRPAIS_
PRDIINH
TMUX_
TEPRDI_
MODE
Transmit TOH and POH Insert Values
—
R/W
0x4003C
page 112
TMUX_TZ0_INS_
VAL
TMUX_TZ03INS[7:0]
TMUX_TZ02INS[7:0]
0x4003D
page 112
TMUX_TS1_F1_
INS_VAL
TMUX_TS1INS[7:0]
TMUX_TF1INS[7:0]
0x4003E
page 112
TMUX_TAPS_
INS_VAL
TMUX_TAPSINS[12:0]
TMUX_TK2INS[2:0]
0x4003F
page 112
TMUX_TPOH1_
INS_A
TMUX_TRDIPINS1[2:0]
TMUX_TC2INS1[7:0]
0x40040
page 112
TMUX_TPOH1_
INS_B
TMUX_TF3INS1[7:0]
TMUX_TF2INS1[7:0]
0x40041
page 112
TMUX_TPOH1_
INS_C
TMUX_TN1INS1[7:0]
TMUX_TK3INS1[7:0]
0x40042
page 112
TMUX_TPOH2_
INS_A
TMUX_TRDIPINS2[2:0]
TMUX_TC2INS2[7:0]
0x40043
page 112
TMUX_TPOH2_
INS_B
TMUX_TF3INS2[7:0]
TMUX_TF2INS2[7:0]
0x40044
page 112
TMUX_TPOH2_
INS_C
TMUX_TN1INS2[7:0]
TMUX_TK3INS2[7:0]
0x40045
page 112
TMUX_TPOH3_
INS_A
TMUX_TRDIPINS3[2:0]
TMUX_TC2INS3[7:0]
0x40046
page 112
TMUX_TPOH3_
INS_B
TMUX_TF3INS3[7:0]
TMUX_TF2INS3[7:0]
0x40047
page 112
TMUX_TPOH3_
INS_C
TMUX_TN1INS3[7:0]
TMUX_TK3INS3[7:0]