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參數(shù)資料
| 型號： | TMS664164DGE-10 |
| 英文描述： | SDRAM|4X1MX16|CMOS|TSOP|54PIN|PLASTIC |
| 中文描述： | 內(nèi)存| 4X1MX16 |的CMOS |的TSOP | 54PIN |塑料 |
| 文件頁數(shù)： | 6/56頁 |
| 文件大?。?/td> | 958K |
| 代理商： | TMS664164DGE-10 |
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TMS664414, TMS664814, TMS664164
4 194 304 BY 4-BIT/2 097 152 BY 8-BIT/1 048 576 BY 16-BIT BY 4-BANK
SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORIES
SMOS695A – APRIL 1998 – REVISED JULY 1998
6
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
operation (continued)
Table 1. Basic Command Truth Table
COMMAND
STATE OF
BANK(S)
CS
RAS
CAS
W
A13
A12
A11
A10
A9–A0
MNEMONIC
Mode register set
All Banks =
deac
L
L
L
L
X
X
X
X
A9 = V, A8 = 0,
A7 = 0, A6 – A0 = V
MRS
Bank deactivate (precharge)
X
L
L
H
L
BS
BS
X
L
X
DEAC
Deactivate all banks
X
L
L
H
L
X
X
X
H
X
DCAB
Bank activate/row-address
entry
SB = deac
L
L
H
H
BS
BS
V
V
V
ACTV
Column address entry/write
Column-address entry/write
operation
A0 – A7 = V,
A8 – A9 = X, for x16
SB = actv
L
H
L
L
BS
BS
X
L
A0 – A8 = V,
A9 = X, for x8
A0 – A9 = V, for x4
WRT
Column address entry/write
Column-address entry/write
operation with auto-deactivate
A0 – A7 = V,
A8 – A9 = X, for x16
SB = actv
L
H
L
L
BS
BS
X
H
A0 – A8 = V,
A9 = X, for x8
A0 – A9 = V, for x4
WRT-P
Column address entry/read
Column-address entry/read
operation
A0 – A7 = V,
A8 – A9 = X, for x16
SB = actv
L
H
L
H
BS
BS
X
L
A0 – A8 = V,
A9 = X, for x8
A0 – A9 = V, for x4
READ
Column address entry/read
Column-address entry/read
operation with auto-deactivate
A0 – A7 = V,
A8 – A9 = X, for x16
SB = actv
L
H
L
H
BS
BS
X
H
A0 – A8 = V,
A9 = X, for x8
A0 – A9 = V, for x4
READ-P
No operation
X
L
H
H
H
X
X
X
X
X
NOOP
Control-input inhibit/no
operation
X
H
X
X
X
X
X
X
X
X
DESL
Auto refresh§
All banks=
deac
L
L
L
H
X
X
X
X
X
REFR
For execution of these commands on cycle n, CKE must satisfy requirements for one of the following:
— CKE (n–1) must be high
— tCESP from power-down exit (PDE)
— tIS and nCLE from clock-suspend (HOLD) exit
— tCESP and tRC from self-refresh (SLFR) exit.
DQMx (n) is a don’t care
§Auto-refresh or self-refresh entry requires that all banks be deactivated or be in an idle state prior to the command entry. An REFR command
turns on four rows (one from each bank; therefore, 4096 REFR commands fully refresh the memory).
Legend:
n
=
CLK cycle number
actv
=
Activated
L
=
Logic low
deac
=
Deactivated
BS
=
Logic:
(A12 = 0, A13 = 0) select bank 0
(A12 = 1, A13 = 0) select bank 1
(A12 = 0, A13 = 1) select bank 2
(A12 = 1, A13 = 1) select bank 3
X =
Don’t care (either logic high or logic low)
SB
=
Select bank by A12 – A13 at cycle n
V =
Valid
H =
Logic high
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TMS664164DGE-8 | SDRAM|4X1MX16|CMOS|TSOP|54PIN|PLASTIC |
| TMS664164DGE-8A | SDRAM|4X1MX16|CMOS|TSOP|54PIN|PLASTIC |
| TMS664414DGE-10 | SDRAM|4X4MX4|CMOS|TSOP|54PIN|PLASTIC |
| TMS664414DGE-8 | SDRAM|4X4MX4|CMOS|TSOP|54PIN|PLASTIC |
| TMS664414DGE-8A | SDRAM|4X4MX4|CMOS|TSOP|54PIN|PLASTIC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TMS664164DGE-8 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SDRAM|4X1MX16|CMOS|TSOP|54PIN|PLASTIC |
| TMS664164DGE-8A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SDRAM|4X1MX16|CMOS|TSOP|54PIN|PLASTIC |
| TMS664414 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:4 194 304 BY 4-BIT/2 097 152 BY 8-BIT/1 048 576 BY 16-BIT BY 4-BANK SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORIES |
| TMS66441410 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:4 194 304 BY 4-BIT/2 097 152 BY 8-BIT/1 048 576 BY 16-BIT BY 4-BANK SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORIES |
| TMS6644148 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:4 194 304 BY 4-BIT/2 097 152 BY 8-BIT/1 048 576 BY 16-BIT BY 4-BANK SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORIES |
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