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參數(shù)資料
| 型號： | TMS370CX8X |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 8位微控制器 |
| 英文描述： | 8-BIT MICROCONTROLLER |
| 中文描述： | 8位微控制器 |
| 文件頁數(shù)： | 8/54頁 |
| 文件大?。?/td> | 785K |
| 代理商： | TMS370CX8X |
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TMS370Cx9x
8-BIT MICROCONTROLLER
SPNS036B – JANUARY 1996 – REVISED FEBRUARY 1997
8
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
CPU (continued)
program counter (PC)
The contents of the PC point to the memory location of the next instruction to be executed. The PC consists
of two 8-bit registers in the CPU: the program counter high (PCH) and program counter low (PCL). These
registers contain the most-significant byte (MSbyte) and least-significant byte (LSbyte) of a 16-bit address.
The contents of the reset vector (7FFEh, 7FFFh) are loaded into the program counter during reset. The PCH
(MSbyte of the PC) is loaded with the contents of memory location 7FFEh, and the PCL (LSbyte of the PC) is
loaded with the contents of memory location 7FFFh. Figure 2 shows this operation using an example value of
6000h as the contents of memory locations 7FFEh and 7FFFh (reset vector).
Memory
Program Counter (PC)
60
00
PCH
PCL
60
00
0000h
7FFEh
7FFFh
Figure 2. Program Counter After Reset
memory map
The TMS370Cx9x architecture is based on the Von Neuman architecture, where the program memory and data
memory share a common address space. All peripheral input/output is memory mapped in this same common
address space. As shown in Figure 3, the TMS370Cx9x provides a memory-mapped RAM, ROM, data
EEPROM, EPROM, input/output pins, peripheral functions, and system-interrupt vectors.
The peripheral file contains all input/output port control, peripheral status and control, EPROM, EEPROM
programming, and system-wide control functions. The peripheral file consists of 256 contiguous addresses
located from 1000h to 107Fh and logically divided into seven peripheral file frames of 16 bytes each. Each
on-chip peripheral is assigned to a separate frame through which peripheral control and data information is
passed. The TMS370Cx9x has its on-chip peripherals and system control assigned to peripheral file frames 1
through 7, addresses 1010h through 107Fh.
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