參數(shù)資料
型號(hào): TMS32C6416DGLSA6E3
廠商: Texas Instruments, Inc.
元件分類: 數(shù)字信號(hào)處理
英文描述: FIXED-POINT DIGITAL SIGNAL PROCESSORS
中文描述: 定點(diǎn)數(shù)字信號(hào)處理器
文件頁數(shù): 14/141頁
文件大?。?/td> 2234K
代理商: TMS32C6416DGLSA6E3
TMS320C6414, TMS320C6415, TMS320C6416
FIXED-POINT DIGITAL SIGNAL PROCESSORS
SPRS146N
FEBRUARY 2001
REVISED MAY 2005
14
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
1443
peripheral register descriptions
Table 4 through Table 23 identify the peripheral registers for the C6414, C6415, and C6416 devices by their
register names, acronyms, and hex address or hex address range. For more detailed information on the register
contents, bit names and their descriptions, see the specific peripheral reference guide listed in the
TMS320C6000 DSP Peripherals Overview Reference Guide
(literature number SPRU190).
Table 4. EMIFA Registers
HEX ADDRESS RANGE
0180 0000
0180 0004
0180 0008
0180 000C
0180 0010
0180 0014
0180 0018
0180 001C
0180 0020
0180 0024
0180 003C
0180 0040
0180 0044
0180 0048
0180 004C
0180 0050
0180 0054
0180 0058
0183 FFFF
ACRONYM
GBLCTL
CECTL1
CECTL0
CECTL2
CECTL3
SDCTL
SDTIM
SDEXT
PDTCTL
CESEC1
CESEC0
CESEC2
CESEC3
REGISTER NAME
EMIFA global control
EMIFA CE1 space control
EMIFA CE0 space control
Reserved
EMIFA CE2 space control
EMIFA CE3 space control
EMIFA SDRAM control
EMIFA SDRAM refresh control
EMIFA SDRAM extension
Reserved
Peripheral device transfer (PDT) control
EMIFA CE1 space secondary control
EMIFA CE0 space secondary control
Reserved
EMIFA CE2 space secondary control
EMIFA CE3 space secondary control
Reserved
Table 5. EMIFB Registers
HEX ADDRESS RANGE
01A8 0000
01A8 0004
01A8 0008
01A8 000C
01A8 0010
01A8 0014
01A8 0018
01A8 001C
01A8 0020
01A8 0024
01A8 003C
01A8 0040
01A8 0044
01A8 0048
01A8 004C
01A8 0050
01A8 0054
01A8 0058
01AB FFFF
ACRONYM
GBLCTL
CECTL1
CECTL0
CECTL2
CECTL3
SDCTL
SDTIM
SDEXT
PDTCTL
CESEC1
CESEC0
CESEC2
CESEC3
REGISTER NAME
EMIFB global control
EMIFB CE1 space control
EMIFB CE0 space control
Reserved
EMIFB CE2 space control
EMIFB CE3 space control
EMIFB SDRAM control
EMIFB SDRAM refresh control
EMIFB SDRAM extension
Reserved
Peripheral device transfer (PDT) control
EMIFB CE1 space secondary control
EMIFB CE0 space secondary control
Reserved
EMIFB CE2 space secondary control
EMIFB CE3 space secondary control
Reserved
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