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參數(shù)資料
| 型號： | TMS29F800B-120CDCDL |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 1048576 BY 8-BIT/ 524288 BY 16-BIT FLASH MEMORIES |
| 中文描述： | 1048576 8位/ 524288由16位閃存 |
| 文件頁數(shù)： | 15/51頁 |
| 文件大?。?/td> | 685K |
| 代理商： | TMS29F800B-120CDCDL |
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TMS29F800T, TMS29F800B
1048576 BY 8-BIT/524288 BY 16-BIT
FLASH MEMORIES
SMJS835B – MAY 1997 – REVISED OCTOBER 1997
15
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
sector-erase command
Sector-erase is a six-bus-cycle command sequence. The first three bus cycles put the device into the
erase-setup state. The next two bus cycles unlock the erase mode and then the sixth bus cycle loads the
sector-erase command and the sector-address location to be erased. Any address location within the desired
sector can be used. The addresses are latched on the falling edge of WE and the sector-erase command (30h)
is latched on the rising edge of WE in the sixth bus cycle. After a delay of 80
μ
s from the rising edge of WE, the
sector-erase operation begins on the selected sector(s).
Additional sectors can be selected to be erased concurrently during the sector-erase command sequence. For
each additional sector to be selected for erase, another bus cycle is issued. The bus cycle loads the next
sector-address location and the sector-erase command. The time between the end of the previous bus cycle
and the start of the next bus cycle must be less than 100
μ
s; otherwise, the new sector location is not loaded.
A time delay of 100
μ
s from the rising edge of the last WE starts the sector-erase operation. If there is a falling
edge of WE within the 100
μ
s time delay, the timer is reset.
One to nineteen sector-address locations can be loaded in any sequence. The state of the delay timer can be
monitored using the sector-erase delay indicator (DQ3). If DQ3 is at logic low, the time delay has not expired.
See the operation status section for a description.
Any command other than erase suspend (B0h) or sector erase (30h) written to the device during the
sector-erase operation causes the device to exit the sector-erase mode and the contents of the sector(s)
selected for erase are no longer valid. To complete the sector-erase operation, re-issue the sector-erase
command sequence.
The embedded sector-erase function automatically provides needed voltage and timing to program and to verify
all of the memory cells prior to electrical erase and then erases and verifies the cell margin automatically.
Programming the memory cells prior to erase is not required.
See the operation status section for a full description. Figure 14 shows a flowchart of the typical sector-erase
operation.
erase-suspend command
The erase-suspend command (B0h) allows interruption of a sector-erase operation to read data from unaltered
sectors of the device. Erase-suspend is a one-bus-cycle command. The addresses can be V
IL
or V
IH
and the
erase-suspend command (B0h) is latched on the rising edge of WE. Once the sector-erase operation is in
progress, the erase-suspend command requests the internal write-state machine to halt operation at
predetermined breakpoints. The erase-suspend command is valid only during the sector-erase operation and
is invalid during programming and chip-erase operations. The sector-erase delay timer expires immediately if
the erase-suspend command is issued while the delay is active.
After the erase-suspend command is issued, the device takes between 0.1
μ
s and 15
μ
s to suspend the
operation. The toggle bit must be monitored to determine when the suspend has been executed. When the
toggle bit stops toggling, data can be read from sectors that are not selected for erase. Reading from a sector
selected for erase can result in invalid data. See the operation status section for a full description.
Once the sector-erase operation is suspended, reading from or programming to a sector that is not being erased
can be performed. This command is applicable only during sector-erase operation. Any other command written
during erase-suspend mode to the suspended sector is ignored.
P
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