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參數(shù)資料
| 型號(hào)： | TMS28F010A-15C3DDE4 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 1048576-BIT FLASH ELECTRICALLY ERASABLE PROGRAMMABLE READ-ONLY MEMORY |
| 中文描述： | 1048576位閃存電可擦除可編程只讀存儲(chǔ)器 |
| 文件頁數(shù)： | 8/22頁 |
| 文件大小： | 328K |
| 代理商： | TMS28F010A-15C3DDE4 |
TMS28F010A
1048576-BIT FLASH
ELECTRICALLY ERASABLE PROGRAMMABLE READ-ONLY MEMORY
SMJS012 – DECEMBER 1992 – REVISED NOVEMBER 1993
8
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
command definitions
read command
Memory contents can be accessed while V
PP
is high or low. When V
PP
is high, writing 00h into the command
register invokes the read operation. When the device is powered up, the default contents of the command
register are 00h and the read operation is enabled. The read operation remains enabled until a different valid
command is written to the command register.
algorithm-selection mode command
The algorithm-selection mode is activated by writing 90h into the command register. The manufacturer
equivalent code (89h) is identified by the value read from address location 0000h, and the device equivalent
code (B4h) is identified by the value read from address location 0001h.
set-up-erase/erase commands
The erase-algorithm initiates with E = V
IL
, W = V
IL
, G = V
IH
, V
PP
= V
PPH
, and V
CC
= 5 V. To enter the erase mode,
write the set-up-erase command, 20h, into the command register. After the TMS28F010A is in the erase mode,
writing a second erase command, 20h, into the command register invokes the erase operation. The erase
operation begins on the rising edge of W and ends on the rising edge of the next W. The erase operation requires
10 ms to complete before the erase-verify command, A0h, can be loaded.
Maximum erase timing is controlled by the internal stop timer. When the stop timer terminates the erase
operation, the device enters an inactive state and remains inactive until a valid erase verify, read, or reset
command is received.
erase-verify command
All bytes must be verified following an erase operation. After the erase operation is complete, an erased byte
can be verified by writing the erase-verify command, A0h, into the command register. This command causes
the device to exit the erase mode on the rising edge of W. The address of the byte to be verified is latched on
the falling edge of W. The erase-verify operation remains enabled until a valid command is written to the
command register.
To determine whether or not all the bytes have been erased, the TMS28F010A applies a margin voltage to each
byte. If FFh is read from the byte, all bits in the designated byte have been erased. The erase-verify operation
continues until all of the bytes have been verified. If FFh is not read from a byte, an additional erase operation
needs to be executed. Figure 2 shows the combination of commands and bus operations for electrically erasing
the TMS28F010A.
set-up-program/program commands
The programming algorithm initiates with E = V
IL
, W = V
IL
, G = V
IH
, V
PP
= V
PPH
, and V
CC
= 5 V. To enter the
programming mode, write the set-up-program command, 40h, into the command register. The programming
operation is invoked by the next write-enable pulse. Addresses are latched internally on the falling edge of W,
and data is latched internally on the rising edge of W. The programming operation begins on the rising edge of
W and ends on the rising edge of the next W pulse. The program operation requires 10
μ
s for completion before
the program-verify command, C0h, can be loaded.
Maximum program timing is controlled by the internal stop timer. When the stop timer terminates the program
operation, the device enters an inactive state and remains inactive until a valid program-verify, read, or reset
command is received.
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| TMS28F010A-15C3DDL | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Flash EEPROM |
| TMS28F010A-15C3DDL4 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:1048576-BIT FLASH ELECTRICALLY ERASABLE PROGRAMMABLE READ-ONLY MEMORY |
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