參數(shù)資料
型號(hào)： TMP320C6414GJL120
廠商： Texas Instruments, Inc.
元件分類： 數(shù)字信號(hào)處理
英文描述： FIXED-POINT DIGITAL SIGNAL PROCESSOR
中文描述： 定點(diǎn)數(shù)字信號(hào)處理器
文件頁數(shù)： 52/70頁
文件大小： 1050K
代理商： TMP320C6414GJL120
TMS320C6205
FIXED-POINT DIGITAL SIGNAL PROCESSOR
SPRS106E
OCTOBER 1999
REVISED MARCH 2004
52
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
1443
PCI SERIAL EEPROM INTERFACE TIMING
timing requirements for serial EEPROM interface (see Figure 32)
NO.
200
UNIT
MIN
50
MAX
8
9
t
su(DIV-CLKH)
t
h(CLKH-DIV)
Setup time, XSP_DI valid before XSP_CLK high
Hold time, XSP_DI valid after XSP_CLK high
ns
ns
0
switching characteristics over recommended operating conditions for serial EEPROM interface
(see Figure 32)
NO.
PARAMETER
200
NOM
2046P
UNIT
MIN
MAX
1
2
t
w(CSL)
t
d(CLKL-CSL)
t
d(CSH-CLKH)
t
w(CLKH)
t
w(CLKL)
t
osu(DOV-CLKH)
t
oh(CLKH-DOV)
Pulse duration, XSP_CS low
Delay time, XSP_CLK low to XSP_CS low
ns
ns
0
3
4
5
6
7
Delay time, XSP_CS high to XSP_CLK high
Pulse duration, XSP_CLK high
Pulse duration, XSP_CLK low
Output setup time, XSP_DO valid after XSP_CLK high
Output hold time, XSP_DO valid after XSP_CLK high
1023P
1023P
1023P
1023P
1023P
ns
ns
ns
ns
ns
P = 1/CPU clock frequency in ns. For example, when running parts at 200 MHz, use P = 5 ns.
9
8
7
6
3
2
5
4
1
XSP_CS
XSP_CLK
XSP_DO
XSP_DI
Figure 32. PCI Serial EEPROM Interface Timing
相關(guān)PDF資料
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