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參數(shù)資料
| 型號： | TMC428 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Intelligent Triple Stepper Motor Controller with Serial Peripheral Interfaces |
| 中文描述： | 三步進電機智能控制器的串行外圍接口 |
| 文件頁數(shù)： | 22/50頁 |
| 文件大?。?/td> | 378K |
| 代理商： | TMC428 |
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TMC428 DATA SHEET (V. 1.00 / February 12, 2001)
22
Copyright 2000, TRINAMIC Microchips GmbH
M I C R O C H I P S
22
Demultiplexing of the multiplexed interrupt status signal at the pin
SDO_C
could be done using additional
hardware. But it is not necessary if the micro controller always disables its interrupt when it sends a
datagram to the TMC428 and enables its interrupt input when sending of the datagram is completed.
32 bit DATAGRAM send from a μC to the TMC428
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9 8 7 6 5 4 3 2 1 0
R
ADDRESS
R
DATA
smda
1 0 1 1
interrupt mask
interrupt flags
0
M
M
M
M
M
M
M
M
I
I
I
I
I
I
I
I
Table 9 - interrupt register & interrupt mask
An interrupt flag is set to ‘1’ if its assigned interrupt condition occurs and the corresponding interrupt
mask is set (‘1’). Interrupt flags are reset to ‘0’ by a write access (RW=’0’) to the interrupt register address
(IDX=%1010) with a ‘1’ at the position of the bit to be cleared. A ‘0’ at the corresponding position within
the datagram used to reset interrupt flags leaves the corresponding interrupt flag untouched.
If an end position is reached and the interrupt mask
MASK_POS_END
is ‘1’ the bit named
INT_POS_END
is set to one. If the reference switch becomes active out of the reference switch tolerance range– defined
by the
dx_ref_tolerance
register –the interrupt flag
INT_REF_WRONG
is set if its interrupt mask bit
MASK_REF_WRONG
is set.
The interrupt flag
INT_REF_MISS
is set if the reference switch is inactive at
the 0 position and the mask
MASK_REF_MISS
is enabled. The
INT_STOP
flag is set, if the reference
switch has forced a stop and if the interrupt mask
MASK_STOP
is set. The
INT_STOP_LEFT_LOW
flag is
set if the reference switch changes from high to low and if the interrupt mask bit
MASK_STOP_LEFT_LOW
is
set.
The
interrupt
INT_STOP_LEFT_LOW
but for the right reference switch. The
INT_STOP_LEFT_HIGH
indicates that the
left reference switch input changes from low to high if the mask
MASK_STOP_LEFT_HIGH
is set. The
INT_STOP_RIGHT_HIGH
indicates
it for the right reference switch if the mask
MASK_STOP_LEFT_HIGH
is set.
flag
INT_STOP_RIGHT_LOW
similar
to
pulse_div & ramp_div & usrs (IDX=%1100)
The frequency of the external clock signal (see Figure 3,
CLK
) is divided by 32 (see Figure 8,
clk_div32
).
This clock drives two programmable clock dividers for the ramp generator and for the pulse generator.
The pulse generator clock– defining the maximum step pulse rate –is determined by the parameter
pulse_div
. The pulse rate
R
(step frequency respectively micro step frequency) is given by
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