參數(shù)資料
型號: TEA5766UK/N1/S21,1
廠商: NXP SEMICONDUCTORS
元件分類: 接收器
英文描述: FM, AUDIO SINGLE CHIP RECEIVER, PBGA25
封裝: 3.30 X 3.25 MM, 0.60 MM HEIGHT, WLCSP-25
文件頁數(shù): 6/59頁
文件大?。?/td> 273K
代理商: TEA5766UK/N1/S21,1
TEA5766UK_1
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 22 March 2007
14 of 59
NXP Semiconductors
TEA5766UK
Stereo FM radio + RDS
8.
Interrupt handling
8.1 Interrupt register
The rst two bytes of the I2C-bus register contain the interrupt masks and the interrupt
ags. A ag is set when it is logic 1.
Fig 5.
Flowchart RDS update
001aab462
activate mute
store 'old' PLL setting
clear LEVFLAG
clear IFFLAG
set PLL to AF frequency
FRRFLAG = 1
BLFLAG = 0
keep mute
(PLL is AF frequency)
FRRFLAG = 1
BLFLAG = 0
not mute
(PLL is old frequency)
wait for PLL to settle
set LEVFLAG
true
false
level OK
wait for IF counter
reset 'old' PLL setting
false
true
IF OK
wait for PLL to settle
start
set IF count time
to 2 ms
Table 7.
INTFLAG (INTREQ byte 1) - I2C-bus register byte 0R bit allocation
7
6
5
4
3
2
1
0
DAVFLG
TESTBIT
LSYNCFL
IFFLAG
LEVFLAG
-
FRRFLAG
BLFLAG
Table 8.
INTMSK (INTREQ byte 2) - I2C-bus register byte 1R/byte 0W bit allocation
7
6
5
4
3
2
1
0
DAVMSK
-
LSYNCMSK
IFMSK
LEVMSK
-
FRRMSK
BLMSK
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