
1996 Sep 25
11
Philips Semiconductors
Product specication
Low-power smart card coupler
TDA8005
Clock circuitry
The clock to the microcontroller and the clock to the card
are derived from the main clock signal (XTAL from
2 to 16 MHz, or an external clock signal).
Microcontroller clock (fclk) after reset, and during power
reduction modes, the microcontroller is clocked with fINT/8,
which is always present because it is derived from the
internal oscillator and gives the lowest power
consumption. When required, (for card session, serial
communication or anything else) the microcontroller may
choose to clock itself with 1
2fxtal, 14fxtal or 12fINT.
All frequency changes are synchronous, thereby ensuring
no hang-up due to short spikes etc.
Cards clock: the microcontroller may select to send the
card 1
2fxtal, 14fxtal, 18fxtal or 12fINT (≈1.25 MHz), or to stop
the clock HIGH or LOW. All transition are synchronous,
ensuring correct pulse length during start or change in
accordance with ISO 7816.
After power on, CLK is set at STOP LOW, and fclk is set at
1
8fINT.
Power-down and sleep modes
The TDA8005 offers a large flexibility for defining power
reduction modes by software. Some configurations are
described below.
In the power-down mode, the microcontroller is in
power-down and the supply and the internal oscillator are
active. The card is not active; this is the smallest power
consumption mode. Any change on P1 ports or on PRES
will wake-up the circuit (for example, a key pressed on the
keyboard, the card inserted or taken off).
In the sleep mode, the card is powered, but configured in
the Idle or sleep mode. The step-up converter will only be
active when it is necessary to reactivate VUP. When the
microcontroller is in Power-down mode any change on P1
ports or on PRES will wake up the circuit.
In both power reduction modes the sequencer is active,
allowing automatic emergency deactivation in the event of
card take-off, hardware problems, or supply drop-out.
The TDA8005 is set into Power-down or sleep mode by
software. There are several ways to return to normal
mode, Introduction or extraction of the card, detection of a
change on P1 (which can be a key pressed) or a command
from the system microcontroller. For example, if the
system monitors the clock on XTAL1, it may stop this clock
after setting the device into power-down mode and then
wake it up when sending the clock again. In this situation,
the internal clock should have been chosen before the fclk.
Peripheral interface
This block allows synchronous serial communication with
the three peripherals (ISO UART, CLOCK CIRCUITRY
and OUTPUT PORTS EXTENSION).
Fig.5 Peripheral interface diagram.
handbook, full pagewidth
MBH635
CC0 CC1 CC2 CC3 CC4 CC5 CC6 CC7
clock configuration
RESET
UC0 UC1 UC2 UC3 UC4 UC5 UC6 UC7
Uart configuration
UT0 UT1 UT2 UT3 UT4 UT5 UT6 UT7
Uart transmit
UR0 UR1 UR2 UR3 UR4 UR5 UR6 UR7
Uart receive
PERIPHERAL CONTROL
US0 US1 US2 US3 US4 US5 US6 US7
Uart status register
PE0 PE1 PE2 PE3 PE4 PE5 PE6 PE7
ports extension
P07
ENABLE
P06
STROBE
P24
DATA
P27
REG0
P26
REG1
P25
R/W
P32
INT