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參數(shù)資料
| 型號： | TB5T1DR |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 外設(shè)及接口 |
| 英文描述： | Low Power 5V RS232 Dual Driver/Receiver with 0.1?μF Capacitors; Package: SO; No of Pins: 16; Temperature Range: -40?°C to 85?°C |
| 中文描述： | 電可擦除可編程邏輯器件 |
| 文件頁數(shù)： | 6/17頁 |
| 文件大?。?/td> | 437K |
| 代理商： | TB5T1DR |
www.ti.com
RECEIVER SWITCHING CHARACTERISTICS
over operating free-air temperature range unless otherwise noted
0
2
4
6
8
10
0
50
C
L
Load Capacitance pF
100
150
200
t
t
PLH
t
PHL
TB5T1
SLLS589B–NOVEMBER 2003–REVISED MAY 2004
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
t
PLH
t
PHL
t
PLH
t
PHL
Propagation delay time, low-to-high-level output
Propagation delay time, high-to-low-level output
Propagation delay time, low-to-high-level output
Propagation delay time, high-to-low-level output
Propagation delay time,
high-level-to-high-impedance output
Propagation delay time,
low-level-to-high-impedance output
2.5
2.5
4
4
C
L
= 0 pF
(1)
, See Figure 4 and Figure 8
ns
3
3
5.5
5.5
C
L
= 15 pF, See Figure 4 and Figure 8
ns
t
PHZ
6
12
ns
C
L
= 5 pF, See Figure 5 and Figure 9
t
PLZ
6
12
ns
Load capacitance (C
L
) = 10 pF, See
Figure 4 and Figure 8
Load capacitance (C
L
) = 150 pF, See
Figure 4 and Figure 8
C
= 10 pF, T
A
= 75
°
C, See Figure 4
and Figure 8
C
= 10 pF, T
= -40
°
C to 85
°
C, See
Figure 4 and Figure 8
C
L
= 10 pF, See Figure 4 and Figure 8
0.7
ns
t
skew1
Pulse width distortion, |t
PHL
- t
PLH
|
4
ns
0.8
1.4
ns
t
skew1p-p
Part-to-part output waveform skew
(2)
1.5
ns
t
skew
Same part output waveform skew
(2)
Propagation delay time,
high-impedance-to-high-level output
Propagation delay time,
high-impedance-to-low-level output
Rise time (20%—80%)
Fall time (80%—20%)
0.3
ns
t
PZH
3
12
ns
C
L
= 10 pF, See Figure 5 and Figure 8
t
PZL
4
12
ns
t
TLH
t
THL
1
1
4
4
ns
ns
C
L
= 10 pF, See Figure 5 and Figure 8
(1)
(2)
The propagation delay values with a 0 pF load are based on design and simulation.
Output waveform skews are when devices operate with the same supply voltage, same temperature, have the same packages and the
same test circuits.
NOTE: This graph is included as an aid to the system designers. Total circuit delay varies with load capacitance. The total
delay is the sum of the delay due to external capacitance and the intrinsic delay of the device. Intrinsic delay is listed
in the table above as the 0 pF load condition. The incremental increase in delay between the 0 pF load condition and
the actual total load capacitance represents the extrinsic, or external delay contributed by the load.
Figure 1. Typical Propagation Delay vs Load Capacitance at 25
°
C
6
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| TB5T1DRE4 | 功能描述:LVDS 接口集成電路 5V Dual Full-Duplex PECL Transceiver RoHS:否 制造商:Texas Instruments 激勵器數(shù)量:4 接收機數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
| TB5T1DW | 功能描述:LVDS 接口集成電路 5V Dual Full-Duplex PECL Transceiver RoHS:否 制造商:Texas Instruments 激勵器數(shù)量:4 接收機數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
| TB5T1DWE4 | 功能描述:LVDS 接口集成電路 5V Dual Full-Duplex PECL Transceiver RoHS:否 制造商:Texas Instruments 激勵器數(shù)量:4 接收機數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
| TB5T1DWR | 功能描述:LVDS 接口集成電路 5V Dual Full-Duplex PECL Transceiver RoHS:否 制造商:Texas Instruments 激勵器數(shù)量:4 接收機數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
| TB5T1DWRE4 | 功能描述:LVDS 接口集成電路 5V Dual Full-Duplex PECL Transceiver RoHS:否 制造商:Texas Instruments 激勵器數(shù)量:4 接收機數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
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