參數(shù)資料
型號(hào)： T8538B
元件分類： Codec
英文描述： T8538B Quad Programmable Codec
中文描述： T8538B四可編程編解碼器
文件頁數(shù)： 2/44頁
文件大?。?/td> 847K
代理商： T8538B
2
Agere Systems Inc.
Preliminary Data Sheet
August 2001
T8538B Quad Programmable Codec
Contents
Page
Features ......................................................................1
Description...................................................................1
General Description.....................................................3
Pin Information ............................................................5
Functional Description.................................................9
Clocking Considerations ...........................................9
The Control Interface ................................................9
Modes ....................................................................9
Protocol................................................................10
Write Command ...................................................12
Read Command...................................................14
Fast Scan Mode...................................................17
Write All Channels................................................19
Reset Functionality .................................................19
Memory Control Mapping.....................................20
Standby Mode.........................................................20
Test Capabilities .....................................................20
SLIC Control Capabilities........................................21
Suggested Initialization Procedures........................21
Signal Processing ...................................................22
Absolute Maximum Ratings.......................................22
Operating Ranges .....................................................23
Handling Precautions ................................................23
Electrical Characteristics...........................................24
dc Characteristics ...................................................24
Analog Interface......................................................25
Gain and Dynamic Range.......................................26
Noise Characteristics..............................................28
Distortion and Group Delay.....................................29
Crosstalk.................................................................30
Timing Characteristics...............................................31
Control Interface Timing..........................................31
Serial Control Port Timing....................................31
Normal Mode........................................................32
Byte-by-Byte Mode...............................................32
PCM Interface Timing .............................................33
Single-Clocking Mode ..........................................33
Double-Clocking Mode.........................................35
Software Interface .....................................................37
Applications...............................................................41
Outline Diagrams.......................................................42
100-Pin TQFP.........................................................42
64-Pin TQFP...........................................................43
Ordering Information..................................................44
Figures
Page
Figure 1. Functional Block Diagram, Each Section.....3
Figure 2. 100-Pin TQFP Pin Diagram..........................5
Figure 3. 64-Pin TQFP Pin Diagram............................7
Figure 4. Command Frame Format, Master to Slave,
Read or Write Commands..........................11
Figure 5. Command Frame Format, Slave to Master,
Read Commands .......................................11
Figure 6. Write Operation, Normal Mode
(Continuous DCLK)....................................12
Figure 7. Write Operation, Normal Mode (Gapped
DCLK) ........................................................12
Figure 8. Write Operation, Byte-by-Byte Mode
(Gapped DCLK)......................................... 13
Figure 9. Write Operation, Byte-by-Byte Mode
(Continuous DCLK)................................... 13
Figure 10. Read Operation, Normal Mode
(Continuous DCLK)................................. 14
Figure 11. Read Operation, Normal Mode
(Gapped DCLK) ...................................... 15
Figure 12. Read Operation, Byte-by-Byte Mode
(Gapped DCLK) ...................................... 15
Figure 13. Read Operation, Byte-by-Byte Mode
(Continuous DCLK)................................. 16
Figure 14. Fast Scan, Normal Mode
(Continuous DCLK)................................. 17
Figure 15. Fast Scan, Normal Mode (Gapped
DCLK) ..................................................... 18
Figure 16. Fast Scan, Byte-by-Byte Mode
(Gapped DCLK) ...................................... 18
Figure 17. Fast Scan, Byte-by-Byte Mode
(Continuous DCLK)................................. 19
Figure 18. Hardware Reset Procedure..................... 19
Figure 19. Internal Signal Processing....................... 22
Figure 20. Serial Interface Timing, Normal Mode
(One Byte Transfer and Continuous
DCLK Shown) ......................................... 32
Figure 21. Byte-by-Byte Mode Timing
(Gapped DCLK Shown) .......................... 32
Figure 22. Single-Clocking Mode (TXBITOFF = 0,
RXBITOFF = 0, PCMCTRL2 = 0x00)...... 34
Figure 23. Single-Clocking Mode (TXBITOFF = 1,
RXBITOFF = 2, PCMCTRL2 = 0x01)...... 34
Figure 24. Double-Clocking Mode (RXBITOFF =
0x20, PCMCTRL2 = 0x00)...................... 36
Figure 25. POTS Interface........................................ 41
Tables
Page
Table 1. Pin Assignments, 100-Pin TQFP,
Per-Channel Functions................................. 5
Table 2. Pin Assignments, 100-Pin TQFP,
Common Functions ...................................... 6
Table 3. Pin Assignments, 64-Pin TQFP,
Per-Channel Functions................................. 7
Table 4. Pin Assignments, 64-Pin TQFP,
Common Functions ...................................... 8
Table 5. Bit Assignments for Fast Scan Mode ......... 17
Table 6. dc Characteristics....................................... 24
Table 7. Analog Interface ......................................... 25
Table 8. Power Dissipation....................................... 25
Table 9. Gain and Dynamic Range .......................... 26
Table 10. Per-Channel Noise Characteristics .......... 28
Table 11. Distortion and Group Delay ...................... 29
Table 12. Crosstalk................................................... 30
Table 13. Serial Control Port Timing ........................ 31
Table 14. PCM Interface Timing: Single-Clocking
Mode ........................................................ 33
Table 15. PCM Interface Timing: Double-Clocking
Mode ........................................................ 35
Table 16. Memory Mapping...................................... 37
Table 17. Control Bit Definition................................. 38
Table of Contents
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