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參數(shù)資料
| 型號(hào)： | SY58627LMG |
| 廠商： | Micrel Inc |
| 文件頁(yè)數(shù)： | 13/17頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC BUFF REC 6.4GBPS 32MLF |
| 標(biāo)準(zhǔn)包裝： | 60 |
| 系列： | * |
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Micrel, Inc.
SY58627L
January 2006
5
M9999-010606-A
hbwhelp@micrel.com or (408) 955-1690
Pin Description (Continued)
Pin Number
Pin Name
Pin Function
13, 14
RXLBQ,
/RXLBQ
Receiver loopback CML compatible output pair. When the SY58627L is in local
Loopback mode (LBSEL = 1), RXLBQ output is directed from TXLBIN (no
equalization). When the SY58627L is in normal mode (LBSEL = LOW) and the
RXLBQ output is not required, disable the RXLBQ output (/RXLBEN = HIGH) to
minimize switching noise. This differential output pair is optimized to drive 400mVPK
swing into a 50
load (100 across the pair). The RXLBQ output pair includes 50
internal source termination resistors.
21, 19
RXQ,
/RXQ
Receiver differential CML compatible output pair: This CML-compatible output pair is
the equalized signal seen at the RXIN input pair and is optimized to drive 400mVPK
swing into a 50
load (100 across the pair). The RXQ output pair includes 50
internal source termination resistors. When the SY58627L is in Loopback mode
(LBSEL = HIGH), the RXQ output signal is directed from the unequalized TXLBIN
input.
26
LOS
Loss-of-Signal output. This LVTTL/CMOS output signal switches LOW when the
signal is valid and switches HIGH when the signal is not valid. This open-collector
output includes an internal 5k
pull-up resistor.
Input signal valid, LOS = LOW, RXIN swing is >110mVPK (220mVPP).
Input signal not valid, LOS = HIGH, RXIN swing is <90mVPK (180mVPP)
20
VTTOUT
Output termination center-tap: Each side of the RXQ differential output pair
terminates to the VTTOUT pin through 50
. The VTTOUT pin provides a center-tap
to the output termination network for maximum interface flexibility, and DC-offset
capability. Please refer to the “CML Output Interface Applications” section for more
details.
28
29
30
EQ2( MSB)
EQ1
EQ0
TTL/CMOS (or VTH controlled) compatible, 3-bit control interface. There are four
levels of equalization, as shown in the “Equalization Select Truth Table.” When the
MSB is logic HIGH, the RXQ output pair will not include any equalization.
000 = lowest equalization setting
001 = medium equalization setting
010 = medium-high equalization setting
011 = highest equalization setting
100 = equalization bypass
1, 8, 9, 16, 17,
24, 25
VCC
Positive Power Supply: Connect to +3.3V power supply. Bypass with 0.1F//0.01F
low ESR capacitors as close to VCC pins as possible.
2, 5, 18, 22, 31,
32
VEE,
Exposed Pad
Ground: Ground pins and exposed pad must be connected to the same ground
plane.
Equalization Select Truth Table
Disable EQ
(MSB = EQ2)
Equalization
Select (EQ1)
Equalization
Select (EQ0)
Typical FR4 Length
Equalization
0
9”
Low
0
1
18”
Medium Low
0
1
0
24”
Medium High
0
1
36”
High
1
X
NA
Disabled
Absolute Maximum Ratings
(1)
Supply Voltage (VCC) .............................................. -0.5V to +4.0V
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SY58627LMG TR | 功能描述:緩沖器和線(xiàn)路驅(qū)動(dòng)器 6.4Gbps Receiver w/ Equalization (I Temp, Green) RoHS:否 制造商:Micrel 輸入線(xiàn)路數(shù)量:1 輸出線(xiàn)路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| SY58627LMGTR | 制造商:MICREL 制造商全稱(chēng):Micrel Semiconductor 功能描述:DC-to-6.4Gbps Backplane Receive Buffer with Four Stage Programmable Equalization and DC-Offset Control |
| SY58627LMG-TR | 功能描述:RECEIVER 6.4GBPS W/EQUALIZATION 制造商:microchip technology 系列:* 零件狀態(tài):過(guò)期 標(biāo)準(zhǔn)包裝:1 |
| SY5A00-5U1 | 制造商:SMC 功能描述:SY5000 5 port solenoid valve 2 x 3/2 24V |
| SY5B00-5U1 | 制造商:SMC 功能描述:SY5000 5 port solenoid valve 2 x 3/2 24V |
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