參數(shù)資料
型號: STDH90
英文描述: Leaded Cartridge Fuse; Current Rating:62.5mA; Voltage Rating:250V; Fuse Terminals:Axial Lead; Fuse Type:Time Delay; Voltage Rating:250V; Body Material:Ceramic; Diameter:6.985mm; Fuse Size/Group:1/4 x 1-1/4 " RoHS Compliant: Yes
中文描述: STDH90 0.35微米STDH90圖書館|數(shù)據(jù)資料
文件頁數(shù): 13/122頁
文件大?。?/td> 277K
代理商: STDH90
1.4
Product Family
Introduction
STDH90/MDL90
1-7
SEC ASIC
1.4.3 Input/Output Cells
There are about four hundred different I/O buffers. Each I/O cell is implemented
solely on the basic I/O cell architecture which forms the periphery of a chip.
A test logic is provided to enable the efficient parametric (threshold voltage)
testing on input buffers including CMOS and TTL level converters, Schmitt
trigger input buffers, clock drivers and oscillator buffers. Pull-up and pull-down
resistors are optional features.
Three basic types of output buffers (non-inverting, tri-state and open drain) are
available in a range of driving capabilities from 2mA to 24mA for 5 V drive .
One or two levels of slew rate controls are provided for each buffer type (except
2mA buffers) to reduce output power/ground noise and signal ringing, especially
in simultaneous switching outputs.
Bi-directional buffers are combinations of input buffers and output buffers
(tri-state or open drain) in a single unit. The I/O structure has been fully
characterized for ESD protection and latch-up resistance.
For user’s convenience, STDH90/MDL90 library provides 50 K
pull-down and
pull-up resistances respectively.
1.4.3.1 I/O Cell Drives Options
To provide designers with the greater flexibility, each I/O buffer can be selected
among various current levels (e.g., 2mA, 4mA, ..., 24mA). The choice of
current-level for I/O buffers affects their propagation delay and current noise.
The slew rate control helps decrease the system noise and output signal
overshoot/undershoot caused by the switching of output buffers. The output
edge rate can be slowed down by selecting the high slew rate control cells.
STDH90/MDL90 provides three different sets of output slew rate controls. Only
one I/O slot is required for any slew rate control options.
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