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INTRODUCTION TO STD80/STDM80
CRYSTAL OSCILLATOR CONSIDERATIONS
SEC ASIC
1-29
STD80/STDM80
Figure 1-30.
Effect on Reducing Peak Current
with Staggering Output Drivers
(5) High-drive outputs should be close to V
SS
pins.
SSOs should be placed particularly close to V
SS
pins.
(6) SSOs should be appropriately placed in groups
belonging to given V
SS
pins.
(7) Noise-sensitive signals such as clock,
asynchronous clear and preset should be located
away from SSOs and high-drive outputs. Also,
assign them to pins with low inductance and
resistance, preferably near V
SS
, if one is available
away from SSOs or high-drive outputs.
(8) Place SSOs on low inductance pins, such as
those located on the inner rows or middle
positions of PGAs.
(9) Clock, preset and clear inputs must not be placed
on the corners of a package, especially when the
array is packaged in DIP.
(10)Output signals to be used as clock, preset or clear
for other devices must be kept away from SSOs
and close to V
SS
pin.
These guidelines assist you in choosing the best
package(s) for the application. Furthermore, the
recommendations about pinout results in reliable and
predictable devices that minimizes harmful DC and AC
effects on the system.
CRYSTAL OSCILLATOR
CONSIDERATIONS
Overview
STD80/STDM80 contains a circuit commonly referred
to as an “on-chip oscillator.” The on-chip circuit itself is
not an oscillator but an amplifier which is suitable for
being used as the amplifier part of a feedback
oscillator. With proper selection of off-chip
components, this oscillator circuit performs better than
any other types of clock oscillators.
It is very important to select suitable off-chip
components to work with the on-chip oscillator
circuitry. It should be noted, however, that SEC cannot
assume the responsibility of writing specifications for
the off-chip components of the complete oscillator
circuit, nor of guaranteeing the performance of the
finished design in production, anymore than a
transistor manufacturer, whose data sheets show a
number of suggested amplifier circuits, can assume
responsibility for the operation, in production, of any of
them.
We are often asked why we don’t publish a list of
required crystal or ceramic resonator specifications,
and recommend values for the other off-chip
components. This has been done in the past, but
sometimes with consequences that were not intended.
Suppose we suggest a maximum crystal resistance of
30ohms for some given frequency. Then your crystal
supplier tells you the 30ohm crystals are going to cost
twice as much as 50ohm crystals. Fearing that SEC
will not “guarantee operation” with 50ohm crystals,
you order the expensive ones.
In fact, SEC guarantees only what is embodied within
an SEC product. Besides, there is no reason why
50ohm crystals couldn’t be used, if the other off-chip
components are suitably adjusted.
Should we recommend values for the other off-chip
components Should we do for 50ohm crystals or
30ohm crystals With respect to what should we
optimize their selection Should we minimize start-up
time or maximize frequency stability
In many applications, neither start-up time nor
frequency stability is particularly critical, and our
“recommendations” are only restricting your system to
unnecessary tolerances. It all depends on the
application.
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3 SSOs
V
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