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參數(shù)資料
| 型號： | STC62WV1024SIG70 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | VERY LOW POWER VOLTAGE CMOS SRAM |
| 中文描述： | 非常低的電壓CMOS的SRAM |
| 文件頁數(shù)： | 3/10頁 |
| 文件大?。?/td> | 385K |
| 代理商： | STC62WV1024SIG70 |
Revision 2.3
Jan.
2004
3
PARAMETER
NAME
PARAMETER
TEST CONDITIONS
MIN. TYP.
(1)
MAX.
UNITS
Vcc=3.0V
V
IL
Guaranteed Input Low
Voltage
Guaranteed Input High
Voltage
Input Leakage Current
Vcc=5.0V
-0.5
--
0.8
V
Vcc=3.0V
2.0
2.2
--
V
IH
Vcc=5.0V
--
Vcc+0.2
V
I
IL
Vcc = Max, V
IN
= 0V to Vcc
--
1
uA
I
LO
Output Leakage Current
Vcc = Max, CE = V
IH
, or OE = V
IH
,
V
I/O
= 0V to Vcc
--
--
1
uA
Vcc=3.0V
V
OL
Output Low Voltage
Vcc = Max, I
OL
= 2mA
Vcc=5.0V
--
--
0.4
V
Vcc=3.0V
V
OH
Output High Voltage
Vcc = Min, I
OH
= -1mA
Vcc=5.0V
2.4
--
--
V
Vcc=3.0V
--
--
20
I
CC
Operating Power Supply
Current
CE = V
IL
, I
DQ
= 0mA, F = Fmax
(3)
Vcc=5.0V
--
--
35
mA
Vcc=3.0V
--
--
1
I
CCSB
Standby Current-TTL
CE = V
IH
, I
DQ
= 0mA
Vcc=5.0V
--
--
2
mA
Vcc=3.0V
--
0.01
0.2
I
CCSB1
Standby Current-CMOS
CE
≧
Vcc-0.2V,
V
IN
≧
Vcc - 0.2V or V
IN
≦
0.2V
Vcc=5.0V
--
0.4
1.0
uA
DC ELECTRICAL CHARACTERISTICS
( TA =0
o
C to + 70
o
C)
STC
STC62WV256
R0201-
STC62WV256
SYMBOL
PARAMETER
TEST CONDITIONS
MIN. TYP.
(1)
MAX.
UNITS
V
DR
Vcc for Data Retention
CE
≧
Vcc - 0.2V
V
IN
≧
Vcc - 0.2V or V
IN
≦
0.2V
1.5
--
--
V
I
CCDR
Data Retention Current
CE
≧
Vcc -0.2V
V
IN
≧
Vcc - 0.2V or V
IN
≦
0.2V
--
0.01
0.20
uA
t
CDR
Chip Deselect to Data
Retention Time
Operation Recovery Time
0
--
--
ns
t
R
See Retention Waveform
T
RC
(2)
--
--
ns
DATA RETENTION CHARACTERISTICS
( TA = 0
o
C to + 70
o
C )
1. Vcc = 1.5V, T
A
= + 25
O
C
2. t
RC
= Read Cycle Time
LOW V
CC
DATA RETENTION WAVEFORM
( CE Controlled )
CE
Data Retention Mode
≥
Vcc
t
CDR
Vcc
t
R
V
IH
V
IH
Vcc
V
DR
1.5V
CE Vcc - 0.2V
1. Typical characteristics are at TA = 25
o
C.
2. These are absolute values with respect to device ground and all overshoots due to system or tester notice are included.
3. Fmax = 1/t
RC
.
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