參數(shù)資料
型號: ST6389
廠商: 意法半導(dǎo)體
英文描述: 8-BIT MCUs WITH ON-SCREEN-DISPLAY FOR TV TUNING
中文描述: 8位微控制器對屏幕,電視調(diào)諧顯示器
文件頁數(shù): 38/82頁
文件大?。?/td> 718K
代理商: ST6389
38/82
ST6380, ST6381, ST6382, ST6383, ST6388, ST6389
SERIAL PERIPHERAL INTERFACE
(Cont’d)
4.3.2 S-BUS/I
2
C BUS Timing Diagrams
The clock of the S-BUS/I
2
C BUS of the ST638x
SPI (single master only) has a fixed bus clock fre-
quency of 62.5KHz. All the devices connected to
the bus must be able to follow transfers with fre-
quencies up to 62.5KHz, either by being able to
transmit or receive at that speed or by applying the
clock synchronization procedure which will force
the master into a wait state and stretch low peri-
ods.
Figure 26. S-BUS Timing Diagram
Note
: The third pin, SEN, should be high; it is not used in the I
2
C BUS. Logically SDA is the AND of the
S-BUS SDA and SEN.)
VA00454
0
3
4
1
1
SCL
SEN (TRANSMIT)
SDA (TRANSMIT)
SDA pulled low by receiver
if acknowledged.
^ ^ ^
^ ^ ^
SDA pulled low by SPI Peripheral.
SDA (RECEIVE)
SEN (RECEIVE)
SEN (START)
SDA (START)
^ ^ ^
SDA pulled low by receiver
if acknowledged.
SEN (STOP)
SDA (STOP)
^ ^ ^
SDA pulled low by receiver if acknowledge. If in receive then there
will be no ACK. by the SPI.
SCL
SCL
2
6
A
7
5
5
7
A
6
1
1
2
4
3
0
5
7
A
6
1
1
2
4
3
0
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