參數(shù)資料
型號(hào): ST6389
廠商: 意法半導(dǎo)體
英文描述: 8-BIT MCUs WITH ON-SCREEN-DISPLAY FOR TV TUNING
中文描述: 8位微控制器對(duì)屏幕,電視調(diào)諧顯示器
文件頁(yè)數(shù): 35/82頁(yè)
文件大?。?/td> 718K
代理商: ST6389
35/82
ST6380, ST6381, ST6382, ST6383, ST6388, ST6389
4.3 SERIAL PERIPHERAL INTERFACE
The ST638x Serial Peripheral Interface (SPI) has
been designed to be cost effective and flexible in
interfacing the various peripherals in TV applica-
tions.
It maintains the software flexibility but adds hard-
ware configurations suitable to drive devices
which require a fast exchange of data. The three
pins dedicated for serial data transfer (single mas-
ter only) can operate in the following ways:
– as standard I/O lines (software configuration)
– as S-BUS or as I
2
C BUS (two pins)
– as standard (shift register) SPI
When using the hardware SPI, a fixed clock rate of
62.5kHz is provided. It has to be noted that the first
bit that is output on the data line by the 8-bit shift
register is the MSB.
4.3.1 S-BUS/I
2
C BUS Protocol Information
The S-BUS is a three-wire bidirectional data-bus
with functional features similar to the I
2
C BUS. In
fact the S-BUS includes decoding of Start/Stop
conditions and the arbitration procedure in case of
multimaster system configuration (the ST638x SPI
allows a single-master only operation). The SDA
line, in the I
2
C BUS represents the AND combina-
tion of SDA and SEN lines in the S-BUS. If the
SDA and the SEN lines are short-circuit connect-
ed, they appear as the SDA line of the I
2
C BUS.
The Start/Stop conditions are detected (by the ex-
ternal peripherals suited to work with S-BUS/I
2
C
BUS) in the following way:
– On S-BUS by a transition of the SEN line (1 to 0
Start, 0 to 1 Stop) while the SCL line is at high
level.
– On I
2
C BUS by a transition of the SDA line (10
Start, 01Stop) while the SCL line is at high level.
Start and Stop condition are always generated by
the master (ST638x SPI can only work as single
master). The bus is busy after the start condition
and can be considered again free only when a cer-
tain time delay is left after the stop condition. In the
S-BUS configuration the SDA line is only allowed
to change during the time SCL line is low. After the
start information the SEN line returns to high level
and remains unchanged for all the data transmis-
sion time. When the transmission is completed the
SDA line is set to high level and, at the same time,
the SEN line returns to the low level in order to
supply the stop information with a low to high tran-
sition, while the SCL line is at high level. On the S-
BUS, as on the I
2
C BUS, each eight bit information
(byte) is followed by one acknowledged bit which
is a high level put on the SDA line by the transmit-
ter. A peripheral that acknowledges has to pull
down the SDA line during the acknowledge clock
pulse. An addressed receiver has to generate an
acknowledge after the reception of each byte; oth-
erwise the SDA line remains at the high level dur-
ing the ninth clock pulse time. In this case the mas-
ter transmitter can generate the Stop condition, via
the SEN (or SDA in I
2
C BUS) line, in order to abort
the transfer.
相關(guān)PDF資料
PDF描述
ST63RS1 8-BIT MICROCONTROLLER
ST63RT1 8-BIT MICROCONTROLLER
ST6400C1003 CONTROLLER CHRONOTHERM
ST650C20L1 THYRISTOR 1557A
ST650C22L1 THYRISTOR 1557A
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ST6389B1 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-BIT MCUs WITH ON-SCREEN-DISPLAY FOR TV TUNING
ST6389B4 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-BIT MCUs WITH ON-SCREEN-DISPLAY FOR TV TUNING
ST6391 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-BIT HCMOS MCUs FOR TV FREQUENCY SYNTHESIS WITH OSD
ST6391B1 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-BIT HCMOS MCUs FOR TV FREQUENCY SYNTHESIS WITH OSD
ST6392 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-BIT HCMOS MCUs FOR TV FREQUENCY SYNTHESIS WITH OSD