參數(shù)資料
型號(hào): ST2202
廠商: Electronic Theatre Controls, Inc.
英文描述: 8 BIT Integrated Microcontroller with 256K Bytes ROM
中文描述: 8位微控制器集成256K字節(jié)ROM的
文件頁(yè)數(shù): 50/65頁(yè)
文件大小: 1946K
代理商: ST2202
Sitronix
ST2202
Ver 2.0a
50/65
2003-May-05
1
1
8
8
.
.
U
U
N
N
I
I
V
V
E
E
R
R
S
S
A
A
L
L
A
A
S
S
Y
Y
N
N
C
C
H
H
R
R
O
O
N
N
O
O
U
U
S
S
R
R
E
E
C
C
E
E
I
I
V
V
E
E
R
R
/
/
T
T
R
R
A
A
N
N
S
S
M
M
I
I
T
T
T
T
E
E
R
R
The ST2202 integrates one universal asynchronous
receiver/transmitter (UART), which can be used to
communicate with external serial devices. Serial data is
transmitted and received at standard bit rates using the
internal baud rate generator (BGR), which is controlled by
BGR control register
BCTR
. Settings of clock output of
BGR (BGRCK) can be found in section 11. FIGURE 18-1
shows the block diagram of UART. Summary of UART
control registers is listed in TABLE 18-1.
CPU Interface
Baud Rate
Generator
Transmitter
Receiver
TXD0
RXD0
Serial
Interface
IrDA
Interface
TXD1
RXD1
FIGURE 18-1 UART Block Diagram
TABLE 18-1 Summary Of UART Control Registers
Bit 7
Bit 6
Bit 5
-
-
-
-
FER
PER
-
-
-
RXINV
TXINV
-
TEST
-
-
UD[7]
UD[6]
UD[5]
BRS[7]
BRS[6]
BRS[5]
BDIV[7] BDIV[6] BDIV[5] BDIV[4] BDIV[3] BDIV[2] BDIV[1] BDIV[0]
PCC[7]
PCC[6]
PCC[5]
PCC[4]
PCD[7]
PCD[6]
PCD[5]
PCD[4]
RXD0
TXD0
SRDY
SS
RXD1
TXD1
CS6
CS5
-
-
-
-
-
-
-
-
Address
$060
Name
UCTR
R/W
R/W
R
W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit 4
-
OER
-
-
-
UD[4]
BRS[4]
Bit 3
PEN
RXBZ
RXTRG
-
-
UD[3]
BRS[3]
Bit 2
PMOD
RXEN
RXEN
PW1
BSTR
UD[2]
BRS[2]
Bit 1
UMOD
TXBZ
TXTRG
PW0
BMOD BGREN
UD[1]
BRS[1]
Bit 0
BRK
TXEN
TXEN
IREN
Default
- - - - 0000
-000 0000
- - - - 0000
00- - -000
0- - - -000
0000 0000
0000 0000
0000 0000
0000 0000
- - - - 0000
- - - - 0000
$061
USTR
$062
$063
$064
$066
$067
$00A
$00B
$00D
$00E
$03D
$03F
IRCTR
BCTR
UDATA
BRS
BDIV
PCC
PCD
PFC
PFD
IREQH
IENAH
UD[0]
BRS[0]
PCC[3]
PCD[3]
MOSI
CS4
IRURX
IEURX
PCC[2]
PCD[2]
MISO
CS3
IRUTX
IEUTX
PCC[1]
PCD[1]
SCK
CS2
IRSRX
IESRX
PCC[0]
PCD[0]
INTX
CS1
IRSTX
IESTX
18.2 UART Operations
The UART has two modes of operation, NRZ and IrDA,
which represent data in different ways for serial
18.2.1 NRZ mode
The non-return to zero (NRZ) mode is primarily associated
with RS-232. Each character is transmitted as a frame
delimited by a start bit at the beginning and a stop bit at the
end. Data bits are transmitted least significant bit (LSB) first,
and each bit occupies a period of time equal to 1 full bit. If
parity is used, the parity bit is transmitted after the most
significant bit. Data settings including data length, stop bit
number and parity are controlled by bit fields in
UCTR
.
FIGURE 18-2 illustrates a character “S” in NRZ mode.
communication protocols, RS-232 and IrDA.
18.2.2 IrDA mode
IrDA mode uses character frames as NRZ mode does, but,
instead of driving ones and zeros for a full bit-time period,
zeros are transmitted as three-sixteenth (or less) bit-time
pulses (which is selected by
PW[1:0]
(
IRCTR[2:1]
), and
ones remain low. The polarity of transmitted pulses and
expected receive pulses can be inverted so that a direct
connection can be made to external IrDA transceiver
modules that use active low pulses. This is controlled by
RXINV
and
TXINV
(
IRCTR[7:6]
). IrDA mode is enabled by
control bit
IREN
(
IRCTR[0]
). FIGURE 18-3 illustrates a
character “S’ in IrDA mode.
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