參數(shù)資料
型號: ST2202
廠商: Electronic Theatre Controls, Inc.
英文描述: 8 BIT Integrated Microcontroller with 256K Bytes ROM
中文描述: 8位微控制器集成256K字節(jié)ROM的
文件頁數(shù): 30/65頁
文件大?。?/td> 1946K
代理商: ST2202
Sitronix
ST2202
Ver 2.0a
30/65
2003-May-05
1
1
3
3
.
.
C
C
L
L
O
O
C
C
K
K
I
I
N
N
G
G
O
O
U
U
T
T
P
P
U
U
T
T
S
S
Three clocking outputs PE0, PE1 and PE2 are supported by
the ST2202. These signals are very useful for outputs of high
frequency, such as PWM base signal or carrier of remote
Clocking Outputs: PE0 and PE1
Overflow states of Timers will be connected to toggle data of
PE[0:1]
when setting function selection bits
TCO0/TCO1
(
PMCR[0:1]
). Meanwhile PE0/PE1 output clocked data of half
the frequency of Timers. After resetting
TCO0/TCO1
, the toggle
operation ceases. Then PE0/PE1 return to the original logic
level of
PE[0:1]
.
control. Timer0, Timer1 overflow signals are clock sources for
PE0 and PE1, while BGRCK are for PE2.
BGRCK will output through PE2 when setting function selection
bit
BCO
(
PMCR[2]
). If
BCO
is cleared, PE2 returns to the
original logic level of
PE[2]
.
Summary of clocking outputs registers is shown in TABLE 13-1.
The clocking outputs enable bits can be found in TABLE 13-2.
Clocking Output: PE2
TABLE 13-1 Summary Of Clocking Outputs Registers
Bit 7
Bit 6
Bit 5
Bit 4
PE[7]
PE[6]
PE[5]
PE[4]
PCE[7]
PCE[6]
PCE[5]
PCE[4]
PULL
PDBN
INTEG
CSM1
Address
$004
$00C
$00F
Name
PE
PCE
PMCR
R/W
R/W
R/W
R/W
Bit 3
PE[3]
PCE[3]
CSM0
Bit 2
PE[2]
PCE[2]
BCO
Bit 1
PE[1]
PCE[1]
TCO1
Bit 0
PE[0]
PCE[0]
TCO0
Default
1111 1111
0000 0000
1000 -000
TABLE 13-2 Port Miscellaneous Control Register (PMCR)
Bit 7
Bit 6
Bit 5
Bit 4
PULL
PDBN
INTEG
CSM1
Address Name
$00F
Bit 0:
TCO0 :
Clocking output PE0 control bit (sourced from Timer0)
0
= Disable clocking output of PE0
1 = Enable clocking output of PE0
Bit 1:
TCO1 :
Clocking output PE1 control bit (sourced from Timer1)
0
= Disable clocking output of PE1
1 = Enable clocking output of PE1
Bit 2:
BCO :
Clock signal output PE2 control bit (sourced from BGRCK)
0
= Disable clock signal output of PE2
1 = Enable clock signal output of PE2
R/W
R/W
Bit 3
CSM0
Bit 2
BCO
Bit 1
TCO1
Bit 0
TCO0
Default
1000 0000
PMCR
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