參數(shù)資料
型號: SSD1905QT2
廠商: Electronic Theatre Controls, Inc.
英文描述: LCD Graphics Controller CMOS
中文描述: LCD圖形控制器的CMOS
文件頁數(shù): 44/153頁
文件大?。?/td> 863K
代理商: SSD1905QT2
SSD1905
Rev 1.3
10/2002
SOLOMON
35
Main Window Display Start Address Register 2
7
6
REG[76h]
0
Bit
5
4
3
2
1
0
0
0
0
0
0
0
Main
window
Display
Start
Address
Bit 16
RW
0
Type
Reset
state
REG[76h] bit 0,
REG[75h] bits 7-0,
REG[74h] bits 7-0
NA
0
NA
0
NA
0
NA
0
NA
0
NA
0
NA
0
Main Window Display Start Address Bits [16:0]
These bits form the 17-bit address for the starting double-word of the LCD image in the
display buffer for the main window.
Note that this is a double-word (32-bit) address.
An entry of 00000h into these
registers represents the first double-word of display memory, an entry of 00001h
represents the second double-word of the display memory, and so on.
Calculate the Display Start Address as follows :
Main Window Display Start Address Bits 16:0
= Image address
÷
4 (valid only for Display Rotate Mode 0
°
)
Note
For information on setting this register for other Display Rotate Mode, see Section 18
“Display Rotate Mode”.
Main Window Line Address Offset Register 0
7
6
REG[78h]
0
Bit
5
4
3
2
1
Main
window
Line
Address
Offset Bit 7
RW
0
Main
window
Line
Address
Offset Bit 6
RW
0
Main
window
Line
Address
Offset Bit 5
RW
0
Main
window
Line
Address
Offset Bit 4
RW
0
Main
window
Line
Address
Offset Bit 3
RW
0
Main
window
Line
Address
Offset Bit 2
RW
0
Main
window
Line
Address
Offset Bit 1
RW
0
Main
window
Line
Address
Offset Bit 0
RW
0
Type
Reset
state
Main Window Line Address Offset Register 1
7
6
REG[79h]
0
Bit
5
4
3
2
1
0
0
0
0
0
0
Main
window
Line
Address
Offset Bit 9
RW
0
Main
window
Line
Address
Offset Bit 8
RW
0
Type
Reset
state
NA
0
NA
0
NA
0
NA
0
NA
0
NA
0
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