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參數(shù)資料
| 型號： | SSD1854Z |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | LCD Segment / Common Driver with Controller CMOS |
| 中文描述： | LCD段/與普通的CMOS驅(qū)動器控制器 |
| 文件頁數(shù)： | 31/48頁 |
| 文件大小： | 771K |
| 代理商： | SSD1854Z |
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SSD1854
Series
Rev 1.0
08/2002
SOLOMON
26
con
out
V
R
R
V
*
1
1
2
+
=
ref
con
V
V
*
210
63
1
=
α
8
COMMAND DESCRIPTIONS
8.1
Set Lower Column Address [00~0F]
This command specifies the lower nibble of the 7-bit column address of the display data RAM.
The column address will be incremented by each data access after it is pre-set by the MCU and
returning to 0 once overflow (>127).
8.2
Set Higher Column Address [10~17]
This command specifies the higher nibble of the 7-bit column address of the display data RAM.
The column address will be incremented by each data access after it is pre-set by the MCU and
returning to 0 once overflow (>127).
8.3
Set Master/Slave Mode [18~19]
This command is used in Cascade function, programming the driver into slave mode. The Osc
clock and M clock (frame) will be received externally to synchronize the COM/SEG waveform.
8.4
Set Internal Regulator Resistors Ratio [20~27]
This command is to enable any one of the eight internal resistor (IRS) settings for different
regulator gains when using internal regulator resistor network. The Contrast Control Voltage
Range curves is referred to the following formula:
where
,
V
1
Vref
=
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