參數(shù)資料
型號: SSD1854U
廠商: Electronic Theatre Controls, Inc.
英文描述: LCD Segment / Common Driver with Controller CMOS
中文描述: LCD段/與普通的CMOS驅(qū)動器控制器
文件頁數(shù): 20/48頁
文件大?。?/td> 771K
代理商: SSD1854U
SSD1854
Series
Rev 1.0
08/2002
SOLOMON
15
7.12 Default Setting after Reset
When
RES
input is low, the chip is initialized to the following:
Register
Default Value
Page address
0
Column address
0
Display ON/OFF
0
Display Start Line
0
Display Offset
0
Mux Ratio
A0H
Normal/Reverse Display
0
N-line Inversion
0
Entire Display
0
Power Control
0,0,0
DC-DC booster
0
Internal Resistor Ratio
0
Contrast
20H
LCD Bias Ratio
6
Scan direction of COM
0
Segment Re-map
0
Internal oscillator
0
Power save mode
0
Data display length
0
FRC, PWM Mode
0
White Palette
(0, 0, 0, 0)
Light Gray Palette
(0, 0, 0, 0)
Dark Gray Palette
(9, 9, 9, 9)
Black Palette
(9, 9, 9, 9)
Test mode
0
Temperature coefficient
2
Upper window corner
0,0
Lower window corner
127,159
When RESET command is issued, the following parameters are initialized only:
Register
Default Value
Page address
0
Column address
0
Display Start Line
0
Internal Resistor Ratio
0
Contrast
20H
Data display length
0
FRC, PWM Mode
0
White Palette
(0, 0, 0, 0)
Light Gray Palette
(0, 0, 0, 0)
Dark Gray Palette
(9, 9, 9, 9)
Black Palette
(9, 9, 9, 9)
Descriptions
Display OFF
GDDRAM page 0,D0
COM0 is mapped to ROW0
160 Mux
Normal Display
No N-line Inversion
Entire Display is OFF
Booster, regulator & divider are both disabled
3X booster is selected
Gain = 3.2 (IR0)
Middle
Optimized for 160 Mux
Normal Scan direction
Segment re-map is disabled
Internal oscillator is OFF
Power save mode is OFF
4FRC, 9PWM
Test mode is OFF
TC2 (-0.1%/
o
C)
Descriptions
GDDRAM page 0,D0
Gain = 3.2 (IR0)
4FRC, 9PWM
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