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SSD1852
Rev 1.0
01/2003
SOLOMON
15
7.9
Graphic Display Data RAM (GDDRAM)
The GDDRAM is a bit mapped static RAM holding the bit pattern to be displayed. The
size of the RAM is 128 x 129 x 2 = 33024 bits. Figure 7 is a description of the GDDRAM
address map.
For mechanical flexibility, re-mapping on both Segment and Common outputs are
provided.
For vertical scrolling of display, an internal register storing the display start line can be
set to control the portion of the RAM data mapped to the display. Figure 7 shows the case in
which the display start line register is set at 70H.
For those GDDRAM out of the display common range, they could still be accessed, for
either preparation of vertical scrolling data or even for the system usage.
7.10 Reset Circuit
This block includes Power On Reset circuitry and the hardware reset pin,
RES
. Both of
these have the same reset function. Once
RES
receives a negative reset pulse, all internal
circuitry will start to initialize. Minimum pulse width for completing the reset sequence is 10us.
Status of the chip after reset is given by:
Register
Default Value
Descriptions
Page address
0
Column address
0
Display ON/OFF
0
Display OFF
Display Start Line
0
GDDRAM page 0,D0
Display Offset
0
COM0 is mapped to ROW0
Mux Ratio
80H
128 Mux
Normal/Reverse Display
0
Normal Display
N-line Inversion
0
No N-line Inversion
Entire Display
0
Entire Display is OFF
DC-DC booster
0
3X booster is selected
Internal Resistor Ratio
0
Gain = 3.45 (IR0)
Contrast
20H
LCD Bias Ratio
7
1/12 Bias Ratio
Scan direction of COM
0
Normal Scan direction
Segment Re-map
0
Segment re-map is disabled
Internal oscillator
0
Internal oscillator is OFF
Power save mode
0
Power save mode is OFF
Data display length
0
FRC, PWM Mode
0
4FRC, 9PWM
White Palette
(0, 0, 0, 0)
Light Gray Palette
(0, 0, 0, 0)
Dark Gray Palette
(9, 9, 9, 9)
Black Palette
(9, 9, 9, 9)
Temperature coefficient
2
PTC2 (-0.125%/
o
C)
Icon display
0
Icon display line is OFF
Power control
0,0,0
Booster, regulator & divider are both disabled
Scan sequence of COM
0
Normal Scan sequence
DMA mode
0
Disable DMA mode