- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄374928 > SSD1801 (Electronic Theatre Controls, Inc.) LCD Segment / Common Driver with Controller for Character Display System PDF資料下載
參數(shù)資料
| 型號： | SSD1801 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | LCD Segment / Common Driver with Controller for Character Display System |
| 中文描述： | LCD段/通用驅(qū)動器與控制器的字符顯示系統(tǒng) |
| 文件頁數(shù)： | 21/42頁 |
| 文件大?。?/td> | 762K |
| 代理商： | SSD1801 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁當(dāng)前第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁
SOLOMON
Rev 1
.
1
01/2003
SSD1801 Series
20
Reset Circuit
This block includes Power On Reset circuitry and the Reset pin RES . Both of these having the same reset
Software control of 1/4 and 1/5 bias ratio to match the characteristic of LCD panel.
function. Once RES receives a negative reset pulse, all internal circuitry will start to initialize. Minimum pulse width
for completing the reset sequence is 10ms.
The status of the chip after reset is given by:
1. Display/ cursor/ blink is turned OFF
2. 2-line display mode
3. Power control register is set to 000b
4. Oscillator is OFF
5. Power save is OFF
6. CGRAM is not used
7. Shift register data clear in serial interface
8. Bias ratio is set to 1/5
9. Address counter is set to 00h
10. Normal scan direction of the COM outputs
11. Contrast control register is set to 00h
12. Test mode is turned OFF
13. In case of 4-bit interface mode selection, SSD1801 considers the 1st 4-bit data from MPU as the
high order bits.
14. The 1st line of display is the address 00h-0Fh.
Display Data Latch
A series of registers carrying the display signal information. For SSD1801, there are 105 latches (80 + 25) for
holding the data, which will be fed to the HV Buffer Cell and Level Selector to output the required voltage levels.
Level Selector
Level Selector is a control of the display synchronization. Display voltage can be separated into two sets and
used with different cycles. Synchronization is important since it selects the required LCD voltage level to the HV
Buffer Cell, which in turn outputs the COM or SEG LCD waveform.
HV Buffer Cell (Level Shifter)
Buffer Cell work as a level shifter which translates the low voltage output signal to the required driving voltage.
The output is shifted out with an internal FRM clock which comes from the Display Timing Generator. The voltage
levels are given by the level selector which is synchronized with the internal M signal.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SSD1801AV | LCD Segment / Common Driver with Controller for Character Display System |
| SSD1801Z | LCD Segment / Common Driver with Controller for Character Display System |
| SSD1812 | LCD Segment / Common Driver with Controller CMOS |
| SSD1812TR | LCD Segment / Common Driver with Controller CMOS |
| SSD1812Z | LCD Segment / Common Driver with Controller CMOS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SSD1801AV | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LCD Segment / Common Driver with Controller for Character Display System |
| SSD1801Z | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LCD Segment / Common Driver with Controller for Character Display System |
| SSD1805 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:132 x 68 STN LCD Segment / Common Monochrome Driver with Controller |
| SSD1805TR1 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:132 x 68 STN LCD Segment / Common Monochrome Driver with Controller |
| SSD1805Z | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:132 x 68 STN LCD Segment / Common Monochrome Driver with Controller |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。