參數(shù)資料
型號: SSD1702Z
廠商: Electronic Theatre Controls, Inc.
英文描述: 240-outputs LCD driver
中文描述: 240 - LCD驅(qū)動輸出
文件頁數(shù): 22/47頁
文件大?。?/td> 586K
代理商: SSD1702Z
Solomon Systech
Dec 2003
P 22/46 Rev 1.1
SSD1702
7. FUNCTIONAL BLOCK DESCRIPTIONS
Active control
In segment mode, this block controls the selection of the chip.
Following an LP signal input, and after the chip select signal is input, a select signal is generated
internally until 240 bits of data have been read in.
Once the data input is completed, a selection signal for cascade connection will be output and the
chip will be deselected.
In common mode, this block controls the input/output data of bi-directional pins.
Data Control
data and transfers the data to Data Latch block in 4-bit format.
When the chip is in segment mode with 8-bit parallel mode enable, this block collects one 8-bit
data every XCK cycle and transfers the data to Data Latch block in 8-bit format.
This block has no function in common mode.
When the chip is in segment mode with 4-bit parallel mode enable, this block collects one 4-bit
Data Latch
This block is only active in segment mode. It latches the data on the data bus which used to
determine the output level of each output pins. The latched state of each LC driver output pin is
controlled by the Data latch control.
Data Latch Control
This block is only active in segment mode.
There are 30 data latch unit in the chip. Each can store two 4-bit data. Data latch control
determines which of the data latch unit should receive the data from Data Control block.
The shift direction is controlled by the Control Logic block. After reading every 4 or 8 bits of data
(depending on 4-bit or 8-bit parallel mode), the selection signal will shift one bit to next data latch based
on the state of the control circuit logic.
Line Latch/Shift Register
In segment mode, it simultaneously latches all 240 bits of data into data latch at the falling edge
of the LP signal and output to the level shift block.
In common mode, it shifts data from the data input pin by one bit at the falling edge of the LP
signal.
Level Shifter
The logic voltage signal is level-shifted to the LCD driving voltage level and outputs to the driver
block.
4-level Driver
This block is used to output appropriate LCD driving voltage level (V
0
, V
12
, V
43
, V
5
) based on the
combinations of S/C, FR and DISPOFF# signals and the data from the line latch or shift register.
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