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參數(shù)資料
| 型號： | SSD1303T3R1 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 132 x 64 Dot Matrix OLED/PLED Segment/Common Driver with Controller |
| 中文描述： | 132 × 64點陣的OLED /短差段/驅(qū)動器與控制器通用 |
| 文件頁數(shù)： | 23/56頁 |
| 文件大小： | 586K |
| 代理商： | SSD1303T3R1 |
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SSD1303
Rev 1.7
P 23/56 May 2005
Solomon Systech
D/C Hex
D7 D6 D5 D4 D3 D2 D1 D0
Command
Description
0
0
D3
A[5:0]
1
*
1
*
0
A
5
A
4
A
3
A
2
A
1
A
0
1
0
0
1
1
Set vertical scroll by COM from 0-63.
The value is reset to 00H after POR.
A[3:0] Define the divide ratio of the display clocks
(DCLK):
Set Display Offset **
0
D5
1
1
0
1
0
1
0
1
Set Display Clock
Divide Ratio/Oscillator
Frequency
0
A[7:0]
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
Divide ratio= A[3:0] + 1, POR is 0000b (divide ratio =
1)
A[7:4] Set the Oscillator Frequency. Oscillator
Frequency increases with the value of A[7:4] and vice
versa. POR is 0111b
0
Set area colour mode
on/off & low power
display mode
X
5
X
4
= 00 (POR) : mono mode
X
5
X
= 11 Area Colour enable
X
2
=0 and X
0
=0: Normal (POR) power mode
X
2
=1 and X
0
=1: Set low power save mode
D8
1
1
0
1
1
0
0
0
0
0
0
X
5
X
4
0
X
2
0
X
0
0
D9
1
1
0
1
1
0
0
1
Set Pre-charge period** A[3:0] Phase 1 period of up to 15 dclk clocks
[POR=2h]; 0 is invalid entry
0
A[7:0]
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
Set COM pins hardware
configuration
A[7:4] Phase 2 period of up to 15 dclk clocks
[POR=2h]; 0 is invalid entry
0
DA
1
1
0
1
1
0
1
0
X
4
=0, Sequential COM pin configuration
(i.e. COM31, 30, 29….0 ; SEG0-132;
COM31,32….62,63)
0
0
0
0
X
4
0
0
1
0
X
4
=1(POR), Alternative COM pin configuration
(i.e. COM62,60,58,…2,0; SEG0-132;
COM1,3,5…61,63)
0
DB
1
1
0
1
1
0
1
1
Set VCOM Deselect
Level
A[6:0] 0000000 low VCOM deselect level (~ 0.43
Vref)
0
A[6:0]
*
A
6
A
5
A
4
A
3
A
2
A
1
A
0
0110101 normal VCOM deselect level (~ 0.77*Vref
(POR))
1111111 high VCOM deselect level (equal Vref)
0
E2
1
1
1
0
0
0
1
0
Reserved
Reserved
0
E3
1
1
1
0
0
0
1
1
NOP **
Command for No Operation
Reserved, do not use
0
F*
1
1
1
1
*
*
*
* Reserved
Note: Remark “*” stands for “Don’t Care”
Table 5 - Read command table
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|---|---|
| SSD1303T6R1 | 132 x 64 Dot Matrix OLED/PLED Segment/Common Driver with Controller |
| SSD1303T8R1 | 132 x 64 Dot Matrix OLED/PLED Segment/Common Driver with Controller |
| SSD1303T9R1 | 132 x 64 Dot Matrix OLED/PLED Segment/Common Driver with Controller |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SSD1303T6R1 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:132 x 64 Dot Matrix OLED/PLED Segment/Common Driver with Controller |
| SSD1303T8R1 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:132 x 64 Dot Matrix OLED/PLED Segment/Common Driver with Controller |
| SSD1303T9R1 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:132 x 64 Dot Matrix OLED/PLED Segment/Common Driver with Controller |
| SSD1303Z | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:132 x 64 Dot Matrix OLED/PLED Segment/Common Driver with Controller |
| SSD1332 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:OLED/PLED Segment/Common Driver with Controller |
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