參數資料
型號: sph4692
廠商: SIEMENS AG
英文描述: power hybrid for SMPS(用于SMPS的電源混合網絡)
中文描述: 電力混合開關電源(用于開關電源的電源混合網絡)
文件頁數: 5/22頁
文件大?。?/td> 537K
代理商: SPH4692
Semiconductor Group
5
SPH 4692
Circuit Description
Application Circuit
The application circuit shows a flyback converter for video recorders with an output power rating of
25 W. The circuit is designed as a wide-range power supply for AC-line voltage of 180 to 264 V. The
AC-input voltage is rectified by the bridge rectifier GR1 and smoothed by
C
1
. The NTC limits the
rush-in current.
In the period before the switch-on threshold is reached the IC is supplied via resistor
R
1
; during the
start-up phase it uses the energy stored in
C
2
, under steady state conditions the IC receives its
supply voltage from transformer winding
n
1
via diode D1. The switching transistor T1 is a BUZ 92.
The parallel connected capacitor
C
3
and the inductance of primary winding
n
2
determine the system
resonance frequency. The
R
2
-
C
4
-D2 circuitry limits overshoot peaks, and
R
13
protects the gate of
T1 against static charges.
During the conductive phase of the power transistor T1 the current rise in the primary winding
depends on the winding inductance and the mains voltage. The network consisting of
R
4
-
C
5
is used
to create a model of the sawtooth shaped rise of the collector current. The resulting control voltage
is fed into pin 2 of the IC. The RC-time constant given by
R
4
-
C
5
must be designed that way that
driving the transistor core into saturation is avoided.
The ratio of the voltage divider
R
10
/
R
11
is fixing a voltage level threshold. Below this threshold the
switching power supply shall stop operation because of the low mains voltage. The control voltage
present at pin 3 also determines the correction current for the fold-back point. This current added
to the current flowing through
R
4
and represents an additional charge to
C
5
in order to reduce the
turn-on phase of T1. This is done to stabilize the fold-back point even under higher main voltages.
Regulation of the switched-mode power supply is via pin 1.The control voltage of winding
n
1
during
the off period of T1 is rectified by D3, smoothed by
C
6
and stepped down at an adjustable ratio by
R
5
,
R
6
and
R
7
. The
R
8
-
C
7
network suppresses parasitic overshoots (transformer oscillation). The
peak voltage at pin 2, and thus the primary peak current, is adjusted by the IC so that the voltage
applied across the control winding, and hence the output voltages, are at the desired level.
When the transformer has supplied its energy to the load, the control voltage passes through zero.
The IC detects the zero crossing via series resistors
R
9
connected to pin 18. But zero crossings are
also produced by transformer oscillation after T1 has turned off if outputs is short-circuited.
Therefore the IC ignores zero crossings occurring within a specified period of time after T1 turn-off.
The capacitor
C
8
connected to pin 17 causes the power supply to be started with shorter pulses to
keep the operating frequency outside the audible range during start-up.
On the secondary side, three output voltages are produced across winding
n
3
to
n
5
rectified by D4
to D6 and smoothed by
C
9
to
C
11
. Resistor
R
12
is used as a bleeder resistor. Fusable resistors
R
15
and
R
16
protect the rectifiers against short-circuits in the output circuits, which are designed to
supply only small loads.
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