參數(shù)資料
型號: SN74LS377N
廠商: ON SEMICONDUCTOR
元件分類: 通用總線功能
英文描述: LOW POWER SCHOTTKY
中文描述: LS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDIP20
封裝: PLASTIC, DIP-20
文件頁數(shù): 3/8頁
文件大小: 127K
代理商: SN74LS377N
SN74LS377
http://onsemi.com
3
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE
(unless otherwise specified)
Limits
Typ
Symbol
Parameter
Min
Max
Unit
Test Conditions
V
IH
Input HIGH Voltage
2.0
V
Guaranteed Input HIGH Voltage for
All Inputs
V
IL
Input LOW Voltage
0.8
V
Guaranteed Input LOW Voltage for
All Inputs
V
IK
V
OH
Input Clamp Diode Voltage
–0.65
–1.5
V
V
CC
= MIN, I
IN
= –18 mA
V
CC
= MIN, I
OH
= MAX, V
IN
= V
IH
or V
IL
per Truth Table
Output HIGH Voltage
2.7
3.5
V
V
OL
Output LOW Voltage
0.25
0.4
V
I
OL
= 4.0 mA
V
CC
= V
CC
MIN,
V
IN
= V
IL
or V
IH
per Truth Table
0.35
0.5
V
I
OL
= 8.0 mA
I
IH
Input HIGH Current
20
μ
A
mA
V
CC
= MAX, V
IN
= 2.7 V
V
CC
= MAX, V
IN
= 7.0 V
V
CC
= MAX, V
IN
= 0.4 V
V
CC
= MAX
V
CC
= MAX, NOTE 1
0.1
I
IL
I
OS
I
CC
Input LOW Current
–0.4
mA
Short Circuit Current (Note 1)
–20
–100
mA
Power Supply Current
28
mA
NOTE: With all inputs open and GND applied to all data and enable inputs, I
CC
is measured after a momentary GND, then 4.5 V is applied to clock.
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.
AC CHARACTERISTICS
(T
A
= 25
°
C, V
CC
= 5.0 V)
Limits
Symbol
Parameter
Min
30
Typ
40
Max
Unit
Test Conditions
f
MAX
t
PLH
t
PHL
Maximum Clock Frequency
MHz
= 5 0 V
V
CC
= 5.0 V
C
L
= 15 pF
Propagation Delay,
Clock to Output
17
18
27
27
ns
AC SETUP REQUIREMENTS
(T
A
= 25
°
C, V
CC
= 5.0 V)
Limits
Symbol
Parameter
Min
20
Typ
Max
Unit
Test Conditions
t
W
t
s
Any Pulse Width
ns
Data Setup Time
20
ns
t
s
Enable Setup
Time
Inactive — State
10
ns
V
CC
= 5.0 V
Active — State
25
ns
t
h
Any Hold Time
5.0
ns
DEFINITION OF TERMS
SETUP TIME (ts) — is defined as the minimum time
required for the correct logic level to be present at the logic
input prior to the clock transition from LOW-to-HIGH in
order to be recognized and transferred to the outputs.
HOLD TIME (t
h
) — is defined as the minimum time
following the clock transition from LOW-to-HIGH that the
logic level must be maintained at the input in order to ensure
continued recognition. A negative HOLD TIME indicates
that the correct logic level may be released prior to the clock
transition from LOW-to-HIGH and still be recognized.
相關PDF資料
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相關代理商/技術參數(shù)
參數(shù)描述
SN74LS377N 制造商:Texas Instruments 功能描述:Logic IC
SN74LS377NE4 功能描述:觸發(fā)器 Octal D-Ty Flip-Flop W/Clock Enable RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel
SN74LS377NS 制造商:Rochester Electronics LLC 功能描述: 制造商:Texas Instruments 功能描述:
SN74LS377NSR 功能描述:觸發(fā)器 Octal D-Ty Flip-Flop W/Clock Enable RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel
SN74LS377NSRE4 功能描述:觸發(fā)器 Octal D-Ty Flip-Flop W/Clock Enable RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel