參數(shù)資料
型號(hào)： SN74ACT3651PCB
廠商： Texas Instruments, Inc.
英文描述： Low-Voltage CMOS Octal Transparent Latch; Package: TSSOP 20 LEAD; No of Pins: 20; Container: Rail; Qty per Container: 75
中文描述： 2048】36時(shí)鐘先入先出存儲(chǔ)器
文件頁(yè)數(shù)： 6/26頁(yè)
文件大小： 376K
代理商： SN74ACT3651PCB
SN74ACT3651
2048
×
36
CLOCKED FIRST-IN, FIRST-OUT MEMORY
SCAS439D – JUNE 1994 – REVISED FEBRUARY 1999
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Terminal Functions (Continued)
TERMINAL
NAME
I/O
DESCRIPTION
W/RA
I
Port-A write/read select. A high on W/RA selects a write operation and a low selects a read operation on port A for
a low-to-high transition of CLKA. The A0–A35 outputs are in the high-impedance state when W/RA is high.
W/RB
I
Port-B write/read select. A low on W/RB selects a write operation and a high selects a read operation on port B for
a low-to-high transition of CLKB. The B0–B35 outputs are in the high-impedance state when W/RB is low.
detailed description
reset
The SN74ACT3651 is reset by taking the reset (RST) input low for at least four port-A clock (CLKA) and four
port-B clock (CLKB) low-to-high transitions. The reset input can switch asynchronously to the clocks. A reset
initializes the memory-read and-write pointers and forces the IR flag low, the OR flag high, the AE flag low, and
the AF flag high. Resetting the device also forces the mailbox flags (MBF1, MBF2) high. After a FIFO is reset,
IR is set high after at least two clock cycles to begin normal operation. A FIFO must be reset after power up
before data is written to its memory.
almost-empty flag and almost-full flag offset programming
Two registers in the SN74ACT3651 are used to hold the offset values for the AE and AF flags. The AE flag offset
register is labeled X, and the AF flag offset register is labeled Y. The offset registers can be loaded with a value
in three ways: one of two preset values is loaded into the offset registers, parallel load from port A, or serial load.
The offset-register-programming mode is chosen by the flag select (FS1, FS0) inputs during a low-to-high
transition on RST (see Table 1).
Table 1. Flag Programming
FS1
FS0
RST
X AND Y REGISTERS
H
H
↑
↑
↑
↑
Serial load
H
L
64
L
H
8
L
L
Parallel load from port A
X register holds the offset for AE; Y register holds the
offset for AF.
preset values
If a preset value of 8 or 64 is chosen by FS1 and FS0 at the time of an RST low-to-high transition according
to Table 1, the preset value is automatically loaded into the X and Y registers. No other device initialization is
necessary to begin normal operation, and the IR flag is set high after two low-to-high transitions on CLKA.
parallel load from port A
To program the X and Y registers from port A, the device is reset with FS0 and FS1 low during the low-to-high
transition of RST. After this reset is complete, the IR flag is set high after two low-to-high transitions on CLKA.
The first two writes to the FIFO do not store data in its memory but load the offset registers in the order Y, X.
Each offset register of the SN74ACT3651 uses port-A inputs (A10–A0). The highest number input is used as
the most-significant bit of the binary number in each case. Each register value can be programmed from 1 to
2044. After both offset registers are programmed from port A, subsequent FIFO writes store data in the SRAM.
相關(guān)PDF資料
PDF描述
SN74ACT3651PQ Low-Voltage CMOS Octal Transparent Latch; Package: TSSOP 20 LEAD; No of Pins: 20; Container: Tape and Reel; Qty per Container: 2500
SN74ACT373DB OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
SN54ACT373FK OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
SN54ACT373J OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
SN54ACT373W OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SN74ACT373DB 制造商:Rochester Electronics LLC 功能描述:- Bulk
SN74ACT373DBR 功能描述:閉鎖 Tri-St Octal D-Type RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時(shí)間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel
SN74ACT373DBRE4 功能描述:閉鎖 Tri-St Octal D-Type RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時(shí)間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel
SN74ACT373DBRG4 功能描述:閉鎖 Octal D-Type Transp RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時(shí)間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel
SN74ACT373DW 功能描述:閉鎖 Tri-St Octal D-Type RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時(shí)間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*