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參數(shù)資料
| 型號： | SN74ACT3638PQ |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Low-Voltage Quad 2-Input OR Gate with 5V-Tolerant Inputs; Package: TSSOP-14; No of Pins: 14; Container: Tape and Reel; Qty per Container: 2500 |
| 中文描述： | 512】32】2時鐘雙向先入先出存儲器 |
| 文件頁數(shù)： | 11/30頁 |
| 文件大?。?/td> | 461K |
| 代理商： | SN74ACT3638PQ |
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SN74ACT3638
512
×
32
×
2
CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY
SCAS228D – JUNE 1992 – REVISED APRIL 1998
11
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
cycle if it occurs at time t
sk2
, or greater, after the read that reduces the number of words in memory to
[512 – (Y + 1)]. Otherwise, the subsequent synchronizing clock cycle may be the first synchronization cycle
(see Figures 15 and 16).
synchronous retransmit
The synchronous retransmit feature of the SN74ACT3638 allows FIFO1 data to be read repeatedly, starting at
a user-selected position. FIFO1 is first put into retransmit mode to select a beginning word and prevent ongoing
FIFO write operations from destroying retransmit data. Data vectors with a minimum length of three words can
retransmit repeatedly, starting at the selected word. FIFO1 can be taken out of retransmit mode at any time and
allow normal operation.
FIFO1 is put in retransmit mode by a low-to-high transition on CLKB when the retransmit-mode (RTM) input is
high and ORB is high. This rising CLKB edge marks the data present in the FIFO1 output register as the first
retransmit data. FIFO1 remains in retransmit mode until a low-to-high transition on CLKB occurs while RTM is
low.
When two or more reads have been completed past the initial retransmit word, a retransmit is initiated by a
low-to-high transition on CLKB when the read-from-mark (RFM) input is high. This rising CLKB edge shifts the
first retransmit word to the FIFO1 output register and subsequent reads can begin immediately. Retransmit
loops can be done endlessly while FIFO1 is in retransmit mode. RFM should not be high during the CLKB rising
edge that takes the FIFO1 out of retransmit mode.
When FIFO1 is put into retransmit mode, it operates with two read pointers. The current read pointer operates
normally, incrementing each time a new word is shifted to the FIFO1 output register and used by the ORB and
AEB flags. The shadow read pointer stores the SRAM location at the time FIFO1 is put into retransmit mode
and does not change until FIFO1 is taken out of retransmit mode. The shadow read pointer is used by the IRA
and AFA flags. Data writes can proceed while FIFO1 is in retransmit mode, AFA is set low by the write that stores
(512 – Y1) words after the first retransmit word, and IR is set low by the 512th write after the first retransmit word.
When FIFO1 is in retransmit mode and RFM is high, a rising CLKB edge loads the current read pointer with the
shadow read-pointer value and the ORB flag reflects the new level of fill immediately. If the retransmit changes
the FIFO1 status out of the almost-empty range, up to two CLKB rising edges after the retransmit cycle are
needed to switch AEB high (see Figure 18). The rising CLKB edge that takes FIFO1 out of retransmit mode shifts
the read pointer used by the IRA and AFA flags from the shadow to the current read pointer. If the change of
read pointer used by IRA and AFA should cause one or both flags to transition high, at least two CLKA
synchronizing cycles are needed before the flags reflect the change. A rising CLKA edge after FIFO1 is taken
out of retransmit mode is the first synchronizing cycle of IRA if it occurs at time t
sk1
or greater after the rising
CLKB edge (see Figure 19). A rising CLKA edge after FIFO1 is taken out of retransmit mode is the first
synchronizing cycle of AFA if it occurs at time t
sk2
, or greater, after the rising CLKB edge (see Figure 20).
mailbox registers
Each FIFO has a 32-bit bypass register to pass command and control information between port A and port B
without putting it in queue. The mailbox-select (MBA, MBB) inputs choose between a mail register and a FIFO
for a port data-transfer operation. A low-to-high transition on CLKA writes A0–A31 data to the mail1 register
when a port-A write is selected by CSA, W/RA, and ENA and with MBA high. A low-to-high transition on CLKB
writes B0–B31 data to the mail2 register when a port-B write is selected by CSB, W/RB, and ENB and with MBB
high. Writing data to a mail register sets its corresponding flag (MBF1 or MBF2) low. Attempted writes to a mail
register are ignored while the mail flag is low.
mailbox registers (continued)
When data outputs of a port are active, the data on the bus comes from the FIFO output register when the port
mailbox-select input is low and from the mail register when the port mailbox-select input is high. The mail1
register flag (MBF1) is set high by a low-to-high transition on CLKB when a port-B read is selected by CSB,
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| SN74ACT3641-15PCB | 功能描述:先進先出 1024 x 36 synch 先進先出 Memory RoHS:否 制造商:IDT 電路數(shù)量: 數(shù)據(jù)總線寬度:18 bit 總線定向:Unidirectional 存儲容量:4 Mbit 定時類型:Synchronous 組織:256 K x 18 最大時鐘頻率:100 MHz 訪問時間:10 ns 電源電壓-最大:3.6 V 電源電壓-最小:6 V 最大工作電流:35 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-80 封裝: |
| SN74ACT3641-15PQ | 功能描述:先進先出 1024 x 36 synch 先進先出 Memory RoHS:否 制造商:IDT 電路數(shù)量: 數(shù)據(jù)總線寬度:18 bit 總線定向:Unidirectional 存儲容量:4 Mbit 定時類型:Synchronous 組織:256 K x 18 最大時鐘頻率:100 MHz 訪問時間:10 ns 電源電壓-最大:3.6 V 電源電壓-最小:6 V 最大工作電流:35 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-80 封裝: |
| SN74ACT3641-20PCB | 功能描述:先進先出 1024 x 36 synch 先進先出 Memory RoHS:否 制造商:IDT 電路數(shù)量: 數(shù)據(jù)總線寬度:18 bit 總線定向:Unidirectional 存儲容量:4 Mbit 定時類型:Synchronous 組織:256 K x 18 最大時鐘頻率:100 MHz 訪問時間:10 ns 電源電壓-最大:3.6 V 電源電壓-最小:6 V 最大工作電流:35 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-80 封裝: |
| SN74ACT3641-20PQ | 功能描述:先進先出 1024 x 36 synch 先進先出 Memory RoHS:否 制造商:IDT 電路數(shù)量: 數(shù)據(jù)總線寬度:18 bit 總線定向:Unidirectional 存儲容量:4 Mbit 定時類型:Synchronous 組織:256 K x 18 最大時鐘頻率:100 MHz 訪問時間:10 ns 電源電壓-最大:3.6 V 電源電壓-最小:6 V 最大工作電流:35 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-80 封裝: |
| SN74ACT3641-30PCB | 功能描述:先進先出 1024 x 36 synch 先進先出 Memory RoHS:否 制造商:IDT 電路數(shù)量: 數(shù)據(jù)總線寬度:18 bit 總線定向:Unidirectional 存儲容量:4 Mbit 定時類型:Synchronous 組織:256 K x 18 最大時鐘頻率:100 MHz 訪問時間:10 ns 電源電壓-最大:3.6 V 電源電壓-最小:6 V 最大工作電流:35 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-80 封裝: |
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