- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄374861 > SN74ABT7820PH (Texas Instruments, Inc.) 512 】 18 】 2 STROBED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY PDF資料下載
參數(shù)資料
| 型號(hào)： | SN74ABT7820PH |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 512 】 18 】 2 STROBED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY |
| 中文描述： | 512】18】2選通雙向先入先出存儲(chǔ)器 |
| 文件頁(yè)數(shù)： | 9/15頁(yè) |
| 文件大?。?/td> | 196K |
| 代理商： | SN74ABT7820PH |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)當(dāng)前第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)
SN74ABT7820
512
×
18
×
2
STROBED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY
SCAS206D – AUGUST 1991 – REVISED APRIL 1998
9
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
offset values for AF/AE
Figure 2
The AF/AE flag of each FIFO has two programmable limits: the almost-empty offset value (X) and the almost-full
offset value (Y). The offsets of a flag can be programmed from the input of its FIFO after it is reset and before
any data is written to its memory. An AF/AE flag is high when its FIFO contains X or fewer words or (512 – Y)
or more words.
To program the offset values for AF/AEA, program enable (PENA) can be brought low after FIFO A is reset and
only when LDCKA is low. On the following low-to-high transition of LDCKA, the binary value on A0–A7 is stored
as the almost-empty offset value (X) and the almost-full offset value (Y). Holding PENA low for another
low-to-high transition of LDCKA reprograms Y to the binary value on A0–A7 at the time of the second LDCKA
low-to-high transition.
PENA can be brought back high only when LDCKA is low during the first two LDCKA cycles. PENA can be
brought high at any time after the second LDCKA pulse returns low. A maximum value of 255 can be
programmed for either X or Y (see Figure 3). To use the default values of X = Y = 128 for AF/AEA, PENA must
be tied high. No data is stored in the FIFO when its AF/AE offsets are programmed. The AF/AEB flag is
programmed in the same manner. PENB enables LDCKB to program the AF/AEB offset values taken from
B0–B7.
ììììììììììì
ììììì
ììììì
ììììì
RSTA
X and Y
Y
PENA
A0–A17
EMPTYA
1
2
LDCKA
Word 1
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SN74ABT7820PN | 512 】 18 】 2 STROBED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY |
| SN74ABT821ADB | 10-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS |
| SN54ABT821FK | 10-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS |
| SN54ABT821JT | 10-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS |
| SN54ABT821W | 10-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SN74ABT821ADBLE | 制造商:Texas Instruments 功能描述: |
| SN74ABT821ADBR | 功能描述:觸發(fā)器 3 St 10bit Bus Inter RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| SN74ABT821ADBRE4 | 功能描述:觸發(fā)器 10-Bit Bus Interface F-F W/3-State Otpt RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| SN74ABT821ADBRG4 | 功能描述:觸發(fā)器 10-Bit Bus Interface RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| SN74ABT821ADW | 功能描述:觸發(fā)器 3 St 10bit Bus Inter RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。